No, you're misunderstanding. You need to pass the literal string $ORIGIN/../lib
as an argument to your linker. The $ORIGIN
token is kept inside your program after it's created and when the runtime linker starts to run your program it will replace $ORIGIN
with the current path that your program was invoked from. This is true even if you've copied your program somewhere else. So if you run your program as /usr/local/bin/myprogram
then the runtime linker will replace $ORIGIN
with /usr/local/bin
. If you copy it to /opt/mystuff/libexec/myprogram
then the runtime linker will replace $ORIGIN
with /opt/mystuff/libexec
.
In order to pass a literal $
to the command invoked by a make recipe, you have to escape the $
by doubling it: $$
. Otherwise, make will see the $
as introducing a make variable or function. Remember, it's perfectly legal for a make variable to avoid the parentheses etc., if it's a single character (note, $@
, $<
, etc.)
So when you write -Wl,-rpath,$ORIGIN/../lib
make will interpret the $O
in $ORIGIN
as expanding a variable named O
, which is empty, giving you -Wl,-rpath,RIGIN/../lib
.
Also you have to escape the $
from the shell, otherwise it will try to expand $ORIGIN
as a shell variable which you don't want.
You want to do something like this:
LDFLAGS = '-Wl,-rpath,$$ORIGIN/../lib' -L/usr/local/lib
LDLIBS = -lPocoFoundation -lPocoNet -lPocoUtil
$(TARGET): $(OBJECTS)
@echo " Linking..."
$(CC) $^ -o $@ $(LDFLAGS) $(LDLIBS)
(I don't know why you use @
to hide the command, then echo the command... why not just take out the @
and the echo
and let make show you the command?)
与恶龙缠斗过久,自身亦成为恶龙;凝视深渊过久,深渊将回以凝视…