Today I got a different understand with my professor on the Parallel Programming class, about what is "false sharing". What my professor said makes little sense so I pointed it out immediately. She thought "false sharing" will cause a mistake in the program's result.
I said, "false sharing" happens when different memory address are assigned to the same cache line, writing data to one of it will cause another being kicked out of the cache. If the processors write between the two false sharing address turn and turn about, both of them could not stay on the cache so all operations will result in the access of DRAMs.
That's my opinion so far. In fact I'm not definitely sure about what I said either... If I got a misunderstanding just point it out please.
So there are some questions. The cache is assumed 64 bytes aligned, 4-way set-associative.
- Is it possible that two address separated by more than 64 bytes are “false sharing”?
- Is it possible that a single threaded program encountered a "false sharing" issue?
- What's the best code example to reproduce the "false sharing"?
- In general, what should be noted to avoid "false sharing" for programmers?
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