The zero register xzr
resp. wzr
is a cute design trick in the Aarch64 ISA. It's register number is 31, just as the stack pointer sp
resp. wsp
. Depending on the context, register number 31 refers to one of them.
This cute trick allows the Aarch64 ISA to simplify its instruction set. For example, the cmp xn, xm
instruction is actually subs xzr, xn, xm
, i.e. it's a subtract with the result being discarded. A mov xn, xm
is simply an orr xn, xzr, xm
. Register 31 is only recognised as the stack pointer where it makes sense and the instruction set has been cleverly chosen so you almost never hit this detail.
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