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Python synth.synthesize函数代码示例

原作者: [db:作者] 来自: [db:来源] 收藏 邀请

本文整理汇总了Python中tulip.synth.synthesize函数的典型用法代码示例。如果您正苦于以下问题:Python synthesize函数的具体用法?Python synthesize怎么用?Python synthesize使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。



在下文中一共展示了synthesize函数的20个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于我们的系统推荐出更棒的Python代码示例。

示例1: test_env_act

def test_env_act():
    """Progress group with environment actions"""
    ts = transys.AFTS()
    ts.owner = 'env'
    ts.sys_actions.add('sys_m0')
    ts.sys_actions.add('sys_m1')
    ts.env_actions.add('env_m0')
    ts.env_actions.add('env_m1')

    ts.states.add('s0')
    ts.states.add('s1')

    ts.transitions.add('s0', 's1', sys_actions='sys_m0', env_actions = 'env_m0')
    ts.transitions.add('s0', 's1', sys_actions='sys_m0', env_actions = 'env_m1')
    ts.transitions.add('s0', 's1', sys_actions='sys_m1', env_actions = 'env_m0')
    ts.transitions.add('s0', 's1', sys_actions='sys_m1', env_actions = 'env_m1')

    ts.transitions.add('s1', 's1', sys_actions='sys_m0', env_actions = 'env_m0')
    ts.transitions.add('s1', 's1', sys_actions='sys_m1', env_actions = 'env_m0')
    ts.transitions.add('s1', 's1', sys_actions='sys_m1', env_actions = 'env_m1')
    ts.transitions.add('s1', 's0', sys_actions='sys_m0', env_actions = 'env_m1')


    specs = spec.GRSpec(set(), set(), set(), set(),
                set(), set(), set(), 'eloc = "s0"')

    # without PG
    ctrl = synth.synthesize('gr1c', specs, env=ts, ignore_env_init=True)
    assert ctrl == None

    # with PG
    ts.set_progress_map({('env_m0', 'sys_m0') : ( 's1', ) })
    ctrl = synth.synthesize('gr1c', specs, env=ts, ignore_env_init=True)
    assert ctrl != None
开发者ID:necozay,项目名称:tulip-control,代码行数:34,代码来源:afts_test.py


示例2: setUp

    def setUp(self):
        self.triv = spec.GRSpec(env_vars="x", sys_vars="y",
                                env_init="x", env_prog="x",
                                sys_init="y", sys_prog="y && x")
        self.triv_M = synth.synthesize("gr1c", self.triv)

        self.dcounter = spec.GRSpec(sys_vars={"y": (0, 5)}, sys_init=["y=0"],
                                    sys_prog=["y=0", "y=5"])
        self.dcounter_M = synth.synthesize("gr1c", self.dcounter)

        self.enumf = spec.GRSpec(sys_vars={'y': ['a', 'b']}, sys_init=['y="a"'],
                                 sys_safety=['y = "a" -> X(y = "b")',
                                             'y = "b" -> X(y = "a")'])
        self.enumf_M = synth.synthesize('gr1c', self.enumf)
开发者ID:ajwagen,项目名称:tulip-control,代码行数:14,代码来源:dumpsmach_test.py


示例3: test_multi_pg

def test_multi_pg():
    """Multiple progress groups for same mode"""
    ts = transys.AFTS()
    ts.owner = 'env'
    ts.sys_actions.add('mode0')
    ts.sys_actions.add('mode1')

    ts.atomic_propositions.add_from(['goal'])

    ts.states.add('s0')
    ts.states.add('s1', ap = {'goal'})
    ts.states.add('s2')

    ts.transitions.add('s0', 's0', sys_actions='mode0')
    ts.transitions.add('s0', 's1', sys_actions='mode0')
    ts.transitions.add('s2', 's1', sys_actions='mode0')
    ts.transitions.add('s2', 's2', sys_actions='mode0')

    ts.transitions.add('s1', 's2', sys_actions='mode1')
    ts.transitions.add('s1', 's0', sys_actions='mode1')

    ts.set_progress_map({'mode0' : [set(['s0']), set(['s1'])] })

    specs = spec.GRSpec(set(), set(), set(), set(),
                set(), set(), set(), 'goal')

    ctrl = synth.synthesize('gr1c', specs, env=ts, ignore_env_init=True)
    assert ctrl != None
开发者ID:necozay,项目名称:tulip-control,代码行数:28,代码来源:afts_test.py


示例4: test_env_act_all

def test_env_act_all():
    """System action progress group with environment actions"""
    ts = transys.AFTS()
    ts.owner = 'env'
    ts.sys_actions.add('sys_m0')
    ts.sys_actions.add('sys_m1')
    ts.env_actions.add('env_m0')
    ts.env_actions.add('env_m1')

    ts.states.add('s0')
    ts.states.add('s1')
    ts.states.add('s2')

    # all s0 -> s1
    ts.transitions.add('s0', 's1', sys_actions='sys_m0', env_actions = 'env_m0')
    ts.transitions.add('s0', 's1', sys_actions='sys_m0', env_actions = 'env_m1')
    ts.transitions.add('s0', 's1', sys_actions='sys_m1', env_actions = 'env_m0')
    ts.transitions.add('s0', 's1', sys_actions='sys_m1', env_actions = 'env_m1')

    # all s1 -> s2
    ts.transitions.add('s1', 's2', sys_actions='sys_m0', env_actions = 'env_m0')
    ts.transitions.add('s1', 's2', sys_actions='sys_m0', env_actions = 'env_m1')
    ts.transitions.add('s1', 's2', sys_actions='sys_m1', env_actions = 'env_m0')
    ts.transitions.add('s1', 's2', sys_actions='sys_m1', env_actions = 'env_m1')


    ts.transitions.add('s2', 's0', sys_actions='sys_m0', env_actions = 'env_m0')
    ts.transitions.add('s2', 's1', sys_actions='sys_m1', env_actions = 'env_m0')
    ts.transitions.add('s2', 's1', sys_actions='sys_m1', env_actions = 'env_m1')
    ts.transitions.add('s2', 's1', sys_actions='sys_m0', env_actions = 'env_m1')

    specs = spec.GRSpec(set(), set(), set(), set(),
                set(), set(), set(), 'eloc = "s0"')

    # without PG
    ctrl = synth.synthesize('gr1c', specs, env=ts, ignore_env_init=True)
    assert ctrl == None

    # with PG that depends on env (env can change and prevent reach)
    ts.set_progress_map({('env_m0', 'sys_m0') : ( 's1', 's2' ) })
    ctrl = synth.synthesize('gr1c', specs, env=ts, ignore_env_init=True)
    assert ctrl == None

    # with PG that does not depend on env
    ts.set_progress_map({'sys_m0' : ( 's1', 's2' ) })
    ctrl = synth.synthesize('gr1c', specs, env=ts, ignore_env_init=True)
    assert ctrl != None
开发者ID:necozay,项目名称:tulip-control,代码行数:47,代码来源:afts_test.py


示例5: test_with_pg

 def test_with_pg(self):
     self.env_sws.set_progress_map({'mode0' : ('s0', 's1', 's2', 's3'),
                                                                'mode1' : ('s0',)
                                                               })
     # eventually reach s4
     sys_prog = {'exit'}
     specs = spec.GRSpec(set(), set(), set(), set(),
         set(), set(), set(), sys_prog)
     ctrl = synth.synthesize('gr1c', specs, env=self.env_sws, ignore_env_init=True)
     assert ctrl != None
开发者ID:necozay,项目名称:tulip-control,代码行数:10,代码来源:afts_test.py


示例6: test_singleton

def test_singleton():
    """AFTS with one mode and one state"""
    ts = transys.AFTS()
    ts.owner = 'env'
    ts.sys_actions.add('mode0')
    ts.states.add('s0')
    ts.transitions.add('s0', 's0', sys_actions='mode0')
    specs = spec.GRSpec(set(), set(), set(), set(),
                set(), set(), set(), set())
    ctrl = synth.synthesize('gr1c', specs, env=ts, ignore_env_init=True)
    assert ctrl != None
开发者ID:necozay,项目名称:tulip-control,代码行数:11,代码来源:afts_test.py


示例7: setUp

    def setUp(self):
        self.triv = spec.GRSpec(env_vars="x", sys_vars="y",
                                env_init="x & y", env_prog="x",
                                sys_init="y", sys_prog="y && x")
        self.triv_M = synth.synthesize(
            self.triv, solver='omega')

        self.dcounter = spec.GRSpec(
            sys_vars={"y": (0, 5)},
            env_init=['y = 0'],
            sys_prog=["y=0", "y=5"])
        self.dcounter_M = synth.synthesize(
            self.dcounter, solver='omega')

        self.enumf = spec.GRSpec(
            sys_vars={'y': ['a', 'b']},
            env_init=['y="a"'],
            sys_safety=['y = "a" -> X(y = "b")',
                        'y = "b" -> X(y = "a")'])
        self.enumf_M = synth.synthesize(
            self.enumf, solver='omega')
开发者ID:johnyf,项目名称:tulip-control,代码行数:21,代码来源:dumpsmach_test.py


示例8: test_nopg

def test_nopg():
    """PG for one mode but not the other"""
    ts = transys.AFTS()
    ts.owner = 'env'
    ts.sys_actions.add('mode0')
    ts.sys_actions.add('mode1')

    ts.states.add_from({'s0', 's1', 's2'})

    ts.transitions.add('s0', 's1', sys_actions='mode0')
    ts.transitions.add('s1', 's0', sys_actions='mode0')
    ts.transitions.add('s1', 's2', sys_actions='mode0')
    ts.transitions.add('s2', 's2', sys_actions='mode0')

    ts.set_progress_map({'mode0' : ('s0', 's1')})

    specs = spec.GRSpec(set(), set(), set(), set(),
                set(), set(), set(), {'eloc = "s1"', 'eloc = "s2"'})
    ctrl = synth.synthesize('gr1c', specs, env=ts, ignore_env_init=True)
    assert ctrl != None
开发者ID:necozay,项目名称:tulip-control,代码行数:20,代码来源:afts_test.py


示例9: print

sys_swe.states.add(states[0], ap={'home'})
sys_swe.states.add(states[1], ap={'lot'})

print(sys_swe)

sys_swe.save('sys_swe.pdf')

# (park & sun) & []<>!park && []<>sum
env_vars = {'park'}
env_init = {'park', 'sun'}
env_prog = {'!park','sun'}
env_safe = set()

# (s0 & mem) & []<> home & [](park -> <>lot)
sys_vars = {'mem'}
sys_init = {'mem', 's0'}          
sys_prog = {'home'}               # []<>home
sys_safe = {'next(mem) <-> lot || (mem && !park)'}
sys_prog |= {'mem'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)
                    
# Controller synthesis
ctrl = synth.synthesize('gr1c', specs, sys=sys_swe,
                        ignore_sys_init=True, bool_actions=True)

if not ctrl.save('switch.pdf'):
    print(ctrl)
开发者ID:ajwagen,项目名称:tulip-control,代码行数:30,代码来源:switch.py


示例10: GR

#

# Augment the environmental description to make it GR(1)
#! TODO: create a function to convert this type of spec automatically

# Define the specification
#! NOTE: maybe "synthesize" should infer the atomic proposition from the 
# transition system? Or, we can declare the mode variable, and the values
# of the mode variable are read from the transition system.
sys_vars = {'X0reach'}
sys_init = {'X0reach'}          
sys_prog = {'home'}               # []<>home
sys_safe = {'(X (X0reach) <-> lot) || (X0reach && !park)'}
sys_prog |= {'X0reach'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)
                    
# Controller synthesis
#
# At this point we can synthesize the controller using one of the available
# methods.  Here we make use of gr1c.
#
ctrl = synth.synthesize('gr1c', specs, sys=sys_swe, ignore_sys_init=True)

# @[email protected]
if not ctrl.save('environment_switching.png'):
    print(ctrl)
# @[email protected]
开发者ID:iamkaushik5,项目名称:tulip-control-1,代码行数:30,代码来源:environment_switching.py


示例11: GR

# Create a GR(1) specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)

#
# Controller synthesis
#
# The controller decides based on current variable values only,
# without knowing yet the next values that environment variables take.
# A controller with this information flow is known as Moore.
specs.moore = True
# Ask the synthesizer to find initial values for system variables
# that, for each initial values that environment variables can
# take and satisfy `env_init`, the initial state satisfies
# `env_init /\ sys_init`.
specs.qinit = '\E \A'  # i.e., "there exist sys_vars: forall sys_vars"

# At this point we can synthesize the controller
# using one of the available methods.
strategy = synth.synthesize(specs)
assert strategy is not None, 'unrealizable'

# Generate a graphical representation of the controller for viewing,
# or a textual representation if pydot is missing.
if not strategy.save('gr1.png'):
    print(strategy)

# simulate
print(strategy)
machines.random_run(strategy, N=10)
开发者ID:johnyf,项目名称:tulip-control,代码行数:30,代码来源:gr1.py


示例12: GR

#     [](X (X0reach) <-> lot || (X0reach && !park))
#

# Augment the environmental description to make it GR(1)
#! TODO: create a function to convert this type of spec automatically

# Define the specification
#! NOTE: maybe "synthesize" should infer the atomic proposition from the 
# transition system? Or, we can declare the mode variable, and the values
# of the mode variable are read from the transition system.
sys_vars = {'X0reach'}
sys_init = {'X0reach','sys_actions = right'}          
sys_prog = {'home'}               # []<>home
sys_safe = {'(X (X0reach) <-> lot) || (X0reach && !park)'}
sys_prog |= {'X0reach'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)
                    
# Controller synthesis
#
# At this point we can synthesize the controller using one of the available
# methods.  Here we make use of JTLV.
#
ctrl = synth.synthesize('jtlv', specs, env=env_sws)

# Generate a graphical representation of the controller for viewing
if not ctrl.save('only_mode_controlled.png'):
    print(ctrl)
开发者ID:ericskim,项目名称:tulip-control,代码行数:30,代码来源:only_mode_controlled.py


示例13: set

env_vars = {'park'}
env_init = set()                # empty set
env_prog = '!park'
env_safe = set()                # empty set

# System variables and requirements
sys_vars = {'X0reach'}
sys_init = {'X0reach'}
sys_prog = {'home'}               # []<>home
sys_safe = {'(X(X0reach) <-> lot) || (X0reach && !park)'}
sys_prog |= {'X0reach'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)
specs.moore = False
specs.qinit = '\A \E'
specs.plus_one = False

# @[email protected]
"""Synthesize"""
ctrl = synth.synthesize(
    specs, sys=disc_dynamics.ts, ignore_sys_init=True, solver='gr1c')
# Unrealizable spec ?
if ctrl is None:
    sys.exit()

# Export Simulink Model
tomatlab.export('robot_continuous.mat', ctrl, sys_dyn, disc_dynamics,
                disc_params)
开发者ID:johnyf,项目名称:tulip-control,代码行数:30,代码来源:continuous.py


示例14: GR

# Augment the system description to make it GR(1)
sys_vars |= {'X0reach'}
sys_init |= {'X0reach'}
sys_safe |= {'(X (X0reach) <-> X0) || (X0reach && !park)'}
sys_prog |= {'X0reach', 'X5'}

# Create a GR(1) specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)

#
# Controller synthesis
#
# At this point we can synthesize the controller
# using one of the available methods.
# Here we make use of jtlv.
#
ctrl = synth.synthesize('jtlv', specs)

# Generate a graphical representation of the controller for viewing,
# or a textual representation if pydot is missing.
if not ctrl.save('gr1.png'):
    print(ctrl)

# either select current state before simulation
ctrl.states.current = [0]
ctrl.simulate(inputs_sequence='random', iterations=10)
    
# or pass it to simulate
ctrl.simulate(inputs_sequence='random', iterations=10, current_state=0)
开发者ID:ljreder,项目名称:tulip-control,代码行数:30,代码来源:gr1.py


示例15: X

sys_vars = {'mem'}
sys_init = {'mem'}
sys_prog = {'home'}

# one additional requirement: if in lot,
# then stay there until park signal is turned off
sys_safe = {'(X(mem) <-> lot) || (mem && !park)',
            '((lot && park) -> X(lot))'}
sys_prog |= {'mem'}

specs = spec.GRSpec(sys_vars=sys_vars, sys_init=sys_init,
                    sys_safety=sys_safe,
                    env_prog=env_prog, sys_prog=sys_prog)

ctrl = synth.synthesize('gr1c', specs, sys=sys, env=env0)
ctrl.save('sys_and_env_ts0.pdf')
logger.info(ctrl)

"""Park as an env action
"""
env1 = transys.FTS()
env1.states.add('e0')
env1.states.initial.add('e0')

env1.env_actions.add_from({'park', ''})

env1.transitions.add('e0', 'e0', env_actions='park')
env1.transitions.add('e0', 'e0', env_actions='')
logger.info(env1)
开发者ID:necozay,项目名称:tulip-control,代码行数:29,代码来源:sys_and_env_ts.py


示例16: GR

#     [](X (X0reach) <-> lot || (X0reach && !park))
#

# Augment the environmental description to make it GR(1)
#! TODO: create a function to convert this type of spec automatically

# Define the specification
#! NOTE: maybe "synthesize" should infer the atomic proposition from the 
# transition system? Or, we can declare the mode variable, and the values
# of the mode variable are read from the transition system.
sys_vars = {'X0reach'}
sys_init = {'X0reach', 'sys_actions = right'}
sys_prog = {'home'}               # []<>home
sys_safe = {'X (X0reach) <-> lot || (X0reach && !park)'}
sys_prog |= {'X0reach'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)
                    
# Controller synthesis
#
# At this point we can synthesize the controller using one of the available
# methods.  Here we make use of JTLV.
#
ctrl = synth.synthesize('jtlv', specs, sys=sys_sws)

# Generate a graphical representation of the controller for viewing
if not ctrl.save('controlled_switching.png'):
    print(ctrl)
开发者ID:ericskim,项目名称:tulip-control,代码行数:30,代码来源:controlled_switching.py


示例17: set

"""Specifications"""
# Environment variables and assumptions
env_vars = {'park'}
env_init = set()                # empty set
env_prog = '!park'
env_safe = set()                # empty set

# System variables and requirements
sys_vars = {'X0reach'}
sys_init = {'X0reach'}          
sys_prog = {'home'}               # []<>home
sys_safe = {'(X(X0reach) <-> lot) || (X0reach && !park)'}
sys_prog |= {'X0reach'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)

# @[email protected]
"""Synthesize"""
ctrl = synth.synthesize('jtlv', specs,
                        sys=disc_dynamics.ts, ignore_sys_init=True)

# Generate a graphical representation of the controller for viewing
if not ctrl.save('continuous.png'):
    print(ctrl)
# @[email protected]

# Simulation
开发者ID:ericskim,项目名称:tulip-control,代码行数:29,代码来源:continuous.py


示例18: X

sys_vars = {'mem'}
sys_init = {'mem'}
sys_prog = {'home'}

# one additional requirement: if in lot,
# then stay there until park signal is turned off
sys_safe = {'(X(mem) <-> lot) || (mem && !park)',
            '((lot && park) -> X(lot))'}
sys_prog |= {'mem'}

specs = spec.GRSpec(sys_vars=sys_vars, sys_init=sys_init,
                    sys_safety=sys_safe,
                    env_prog=env_prog, sys_prog=sys_prog)
specs.moore = False
specs.qinit = '\A \E'
ctrl = synth.synthesize(specs, sys=sys, env=env0)
ctrl.save('sys_and_env_ts0.pdf')
logger.info(ctrl)

"""Park as an env action
"""
env1 = transys.FTS()
env1.owner = 'env'
env1.states.add('e0')
env1.states.initial.add('e0')

env1.env_actions.add_from({'park', 'none'})

env1.transitions.add('e0', 'e0', env_actions='park')
env1.transitions.add('e0', 'e0', env_actions='none')
logger.info(env1)
开发者ID:johnyf,项目名称:tulip-control,代码行数:31,代码来源:sys_and_env_ts.py


示例19: next

# Define the specification
#! NOTE: maybe "synthesize" should infer the atomic proposition from the 
# transition system? Or, we can declare the mode variable, and the values
# of the mode variable are read from the transition system.
sys_vars = {'X0reach'}
sys_init = {'X0reach'}          
sys_prog = {'home'}               # []<>home
sys_safe = {'next(X0reach) <-> lot || (X0reach && !park)'}
sys_prog |= {'X0reach'}

# Possible additional specs
# It is unsafe to "break" (switch to gear0) when road is slippery
sys_safe |= {'(gear1 && slippery) -> next(gear1)'}

# to use int actions with gr1c:
# sys_safe |= {'((act = gear1) && (eact = slippery)) -> next(act = gear1)'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)

# Controller synthesis
#
# At this point we can synthesize the controller using one of the available
# methods.  Here we make use of JTLV.
#
ctrl = synth.synthesize('jtlv', specs, sys=sys_hyb, ignore_sys_init=True)

if not ctrl.save('hybrid.png'):
    print(ctrl)
开发者ID:mfalt,项目名称:tulip-control,代码行数:30,代码来源:hybrid.py


示例20: open

You can configure it also directly in python, but
rewriting or copy/pasting again and again the same
base configuration is not very efficient.
"""
import logging.config
import json
import pprint

fname = 'logging_config.json'
with open(fname, 'r') as f:
    config = json.load(f)
print('Your logging config is:\n{s}')
pprint.pprint(config)

logging.config.dictConfig(config)

from tulip import transys, spec, synth

sys = transys.FTS()
sys.states.add_from({0, 1})
sys.states.initial.add(0)

sys.add_edges_from([(0, 1), (1, 0)])

sys.atomic_propositions.add('p')
sys.node[0]['ap'] = {'p'}

specs = spec.GRSpec(sys_vars={'p'}, sys_prog={'p'})

mealy = synth.synthesize('gr1c', specs, sys=sys)
开发者ID:ajwagen,项目名称:tulip-control,代码行数:30,代码来源:howto_use_logging.py



注:本文中的tulip.synth.synthesize函数示例由纯净天空整理自Github/MSDocs等源码及文档管理平台,相关代码片段筛选自各路编程大神贡献的开源项目,源码版权归原作者所有,传播和使用请参考对应项目的License;未经允许,请勿转载。


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