/* Set up an indirect table of descriptors and add it to the queue. */
static int vring_add_indirect(struct vring_virtqueue *vq,
			      struct scatterlist sg[],
			      unsigned int out,
			      unsigned int in,
			      gfp_t gfp)
{
	struct vring_desc *desc;
	unsigned head;
	int i;

	desc = kmalloc((out + in) * sizeof(struct vring_desc), gfp);
	if (!desc)
		return -ENOMEM;

	/* Transfer entries from the sg list into the indirect page */
	for (i = 0; i < out; i++) {
		desc[i].flags = VRING_DESC_F_NEXT;
		desc[i].addr = sg_phys(sg);
		desc[i].len = sg->length;
		desc[i].next = i+1;
		sg++;
	}
	for (; i < (out + in); i++) {
		desc[i].flags = VRING_DESC_F_NEXT|VRING_DESC_F_WRITE;
		desc[i].addr = sg_phys(sg);
		desc[i].len = sg->length;
		desc[i].next = i+1;
		sg++;
	}

	/* Last one doesn't continue. */
	desc[i-1].flags &= ~VRING_DESC_F_NEXT;
	desc[i-1].next = 0;

	/* We're about to use a buffer */
	vq->num_free--;

	/* Use a single buffer which doesn't continue */
	head = vq->free_head;
	vq->vring.desc[head].flags = VRING_DESC_F_INDIRECT;
	vq->vring.desc[head].addr = virt_to_phys(desc);
	vq->vring.desc[head].len = i * sizeof(struct vring_desc);

	/* Update free pointer */
	vq->free_head = vq->vring.desc[head].next;

	return head;
}

static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
			     int nents, enum dma_data_direction direction,
			     unsigned long attrs)
{
	struct scatterlist *sg;
	int i;

	/* FIXME this part of code is untested */
	for_each_sg(sgl, sg, nents, i) {
		sg->dma_address = sg_phys(sg);

		if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
			continue;

		__dma_sync(sg_phys(sg), sg->length, direction);
	}

void dma_direct_sync_sg_for_device(struct device *dev,
		struct scatterlist *sgl, int nents, enum dma_data_direction dir)
{
	struct scatterlist *sg;
	int i;

	for_each_sg(sgl, sg, nents, i) {
		if (unlikely(is_swiotlb_buffer(sg_phys(sg))))
			swiotlb_tbl_sync_single(dev, sg_phys(sg), sg->length,
					dir, SYNC_FOR_DEVICE);

		if (!dev_is_dma_coherent(dev))
			arch_sync_dma_for_device(dev, sg_phys(sg), sg->length,
					dir);
	}
}

static int tegra_bo_get_pages(struct drm_device *drm, struct tegra_bo *bo)
{
	struct scatterlist *s;
	unsigned int i;

	bo->pages = drm_gem_get_pages(&bo->gem);
	if (IS_ERR(bo->pages))
		return PTR_ERR(bo->pages);

	bo->num_pages = bo->gem.size >> PAGE_SHIFT;

	bo->sgt = drm_prime_pages_to_sg(bo->pages, bo->num_pages);
	if (IS_ERR(bo->sgt))
		goto put_pages;

	/*
	 * Fake up the SG table so that dma_sync_sg_for_device() can be used
	 * to flush the pages associated with it.
	 *
	 * TODO: Replace this by drm_clflash_sg() once it can be implemented
	 * without relying on symbols that are not exported.
	 */
	for_each_sg(bo->sgt->sgl, s, bo->sgt->nents, i)
		sg_dma_address(s) = sg_phys(s);

	dma_sync_sg_for_device(drm->dev, bo->sgt->sgl, bo->sgt->nents,
			       DMA_TO_DEVICE);

	return 0;

put_pages:
	drm_gem_put_pages(&bo->gem, bo->pages, false, false);
	return PTR_ERR(bo->sgt);
}

static void *ion_page_pool_alloc_pages(struct ion_page_pool *pool)
{
	struct page *page;
	struct scatterlist sg;

	page = alloc_pages(pool->gfp_mask & ~__GFP_ZERO, pool->order);

	if (!page)
		return NULL;

	if (pool->gfp_mask & __GFP_ZERO)
		if (ion_heap_high_order_page_zero(
				page, pool->order, pool->should_invalidate))
			goto error_free_pages;

	sg_init_table(&sg, 1);
	sg_set_page(&sg, page, PAGE_SIZE << pool->order, 0);
	sg_dma_address(&sg) = sg_phys(&sg);
	dma_sync_sg_for_device(NULL, &sg, 1, DMA_BIDIRECTIONAL);

	return page;
error_free_pages:
	__free_pages(page, pool->order);
	return NULL;
}

ssize_t fmpfw_hash_update(struct fmp_info *info, struct hash_data *hdata,
				struct scatterlist *sg, size_t len)
{
	int ret = 0;
	unsigned long addr;
	struct device *dev = info->dev;
	struct hmac_sha256_fmpfw_info *fmpfw_info = hdata->fmpfw_info;

	fmpfw_info->s.step = UPDATE;
	fmpfw_info->s.input = (uint32_t)sg_phys(sg);
	__flush_dcache_area(sg_virt(sg), len);
	fmpfw_info->s.input_len = len;
	__flush_dcache_area(fmpfw_info, sizeof(*fmpfw_info));
	addr = virt_to_phys(fmpfw_info);

	reinit_completion(&hdata->async.result->completion);
	if (fmpfw_info->hmac_mode) {
		ret = exynos_smc(SMC_CMD_FMP, FMP_FW_HMAC_SHA2_TEST, addr, 0);
		if (unlikely(ret)) {
			dev_err(dev, "Fail to smc call for FMPFW HMAC SHA256 update. ret = 0x%x\n", ret);
			ret = -EFAULT;
		}
	} else {
		ret = exynos_smc(SMC_CMD_FMP, FMP_FW_SHA2_TEST, addr, 0);
		if (unlikely(ret)) {
			dev_err(dev, "Fail to smc call for FMPFW SHA256 update. ret = 0x%x\n", ret);
			ret = -EFAULT;
		}
	}

	return waitfor(info, hdata->async.result, ret);
}

static void arc_dma_sync_sg_for_device(struct device *dev,
		struct scatterlist *sglist, int nelems,
		enum dma_data_direction dir)
{
	int i;
	struct scatterlist *sg;

	for_each_sg(sglist, sg, nelems, i)
		_dma_cache_sync(sg_phys(sg), sg->length, dir);
}

static int map_sg(struct device *dev, struct scatterlist *sgl,
                  int nents, enum dma_data_direction direction,
                  struct dma_attrs *attrs)
{
    struct scatterlist *sg;
    int i;

    for_each_sg(sgl, sg, nents, i) {
        sg->dma_address = sg_phys(sg);
    }

/**
* @brief 	SD card write function with scatter list.
* @param 	sd[in]: Card information.
* @param 	sector[in]: Start sector.
* @param 	sg[in]: Scatter list pointer.
* @param 	ln[in]: List number.
* @return 	Actual sectors by reading/ERROR_ID(<0).
*/
int gp_sdcard_write_scatter(gpSDInfo_t * sd, unsigned int sector, struct scatterlist *sg, unsigned int ln)
{
	int i;
	struct scatterlist *sg_ev;
	int ret = 0;
	int sector_num = 0;
#ifdef USE_DMA	
	unsigned sgln;
	sgln = dma_map_sg(NULL, sg, ln, DMA_TO_DEVICE);
	if(sgln!=ln)
	{
		dma_unmap_sg(NULL, sg, sgln, DMA_TO_DEVICE);
		DERROR("[%d]: SG map fail, sgln = %d, ln = %d\n", sd->device_id, sgln, ln);
		return -ENOMEM;
	}
#endif	
	if(gp_sdcard_writecmd(sd->device_id,sector)==SP_FALSE)
	{
		ret = -EIO;
		goto out_error;
	}
	DEBUG("SD: write sector %d\n", sector);
	
	for_each_sg(sg, sg_ev, ln, i) 
	{
		unsigned int number = sg_dma_len(sg_ev)>>9;
		/* ----- Start dma ----- */ 
	#ifdef USE_DMA
		if(gp_sdcard_dma_en(sd->device_id, (unsigned char*)sg_phys(sg_ev), sg_dma_len(sg_ev),1)==SP_FALSE)
	#else
		if(gp_sdcard_dma_en(sd->device_id, (unsigned char*)sg_virt(sg_ev), sg_dma_len(sg_ev),1)==SP_FALSE)
	#endif
		{
			ret = -ENOMEM;
			DERROR("[%d]:DMA Enable error\n", sd->device_id);
			goto out_error;
		}
		/* ----- Wait dma finish ----- */
		ret = gp_sdcard_dma_finish(sd->device_id, (sg_dma_len(sg_ev)>>9)*WRITE_TIMEOUT);
		if(ret!=0)
		{
			gp_apbdma0_stop(sd->handle_dma);
			DERROR("[%d]:DMA error: %d, SD status 0x%x\n", sd->device_id, ret,gpHalSDGetStatus(sd->device_id));
			goto out_error;
		}
	#ifdef USE_DMA	
		if(gpHalSDWaitDataComplete(sd->device_id) == SP_FALSE)
		{
			DERROR("[%d]: wait complete error: SD status 0x%x\n", sd->device_id, gpHalSDGetStatus(sd->device_id));
			ret = -ETIMEDOUT;
			goto out_error;
		}
	#endif
		sector_num += number;
	}

int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
	       enum dma_data_direction dir)
{
	int i;

	for (i = 0; i < nents; sg++, i++) {
		sg->dma_address = sg_phys(sg);
		dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
	}
	return nents;
}

static int mn10300_dma_map_sg(struct device *dev, struct scatterlist *sglist,
		int nents, enum dma_data_direction direction,
		unsigned long attrs)
{
	struct scatterlist *sg;
	int i;

	for_each_sg(sglist, sg, nents, i) {
		BUG_ON(!sg_page(sg));

		sg->dma_address = sg_phys(sg);
	}

static IMG_BOOL GetPhysAddrFromLCDInfo(struct fb_info *psLINFBInfo,
				IMG_UINT32 *pui32PageCount,
				IMG_SYS_PHYADDR **ppasSysPhysAddr)
{
	IMG_UINT32 i;
	IMG_UINT32 ui32PageCount = 0;
	struct scatterlist *psScatterList;
	struct scatterlist *psTemp;
	struct s3c_fb_win *pfb_win = (struct s3c_fb_win*)psLINFBInfo->par;
	IMG_SYS_PHYADDR *pasSysPhysAddr = NULL;
	psScatterList = pfb_win->dma_buf_data.sg_table->sgl;

	for (i=0;i<2;i++)
	{
		psTemp = psScatterList;
		if (i == 1)
		{
			pasSysPhysAddr = kmalloc(sizeof(IMG_SYS_PHYADDR) * ui32PageCount, GFP_KERNEL);
			if (pasSysPhysAddr == NULL)
			{
				printk("out of memory: cannot alloc mem for structure %s\n", __func__);
				goto exitFailAlloc;
			}
			ui32PageCount = 0;	/* Reset the page count a we use if for the index */
		}

		while(psTemp)
		{
			IMG_UINT32 j;

			for (j=0;j<psTemp->length;j+=PAGE_SIZE)
			{
				if (i == 1)
				{
					pasSysPhysAddr[ui32PageCount].uiAddr = sg_phys(psTemp) + j;
				}
				ui32PageCount++;
			}
			psTemp = sg_next(psTemp);
		}
	}
	printk("\n uiCount = %d\n", ui32PageCount);

	*pui32PageCount = ui32PageCount;
	*ppasSysPhysAddr = pasSysPhysAddr;

	return IMG_TRUE;

exitFailAlloc:
	kfree(pasSysPhysAddr);
	*ppasSysPhysAddr = IMG_NULL;
	return IMG_FALSE;
}

static phys_addr_t get_phys_addr(struct scatterlist *sg)
{
    /*
     * Try sg_dma_address first so that we can
     * map carveout regions that do not have a
     * struct page associated with them.
     */
    phys_addr_t pa = sg_dma_address(sg);
    if (pa == 0)
        pa = sg_phys(sg);
    return pa;
}

static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
			     int nents, enum dma_data_direction direction,
			     struct dma_attrs *attrs)
{
	struct scatterlist *sg;
	int i;

	for_each_sg(sgl, sg, nents, i) {
		sg->dma_address = sg_phys(sg) + get_dma_offset(dev);
		sg->dma_length = sg->length;
		__dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
	}

static int gk20a_ltc_alloc_phys_cbc(struct gk20a *g,
				    size_t compbit_backing_size)
{
	struct gr_gk20a *gr = &g->gr;
	int order = ffs(compbit_backing_size >> PAGE_SHIFT);
	struct page *pages;
	struct sg_table *sgt;
	int err = 0;

	/* allocate few pages */
	pages = alloc_pages(GFP_KERNEL, order);
	if (!pages) {
		gk20a_dbg(gpu_dbg_pte, "alloc_pages failed\n");
		err = -ENOMEM;
		goto err_alloc_pages;
	}

	/* clean up the pages */
	memset(page_address(pages), 0, compbit_backing_size);

	/* allocate room for placing the pages pointer.. */
	gr->compbit_store.pages =
		kzalloc(sizeof(*gr->compbit_store.pages), GFP_KERNEL);
	if (!gr->compbit_store.pages) {
		gk20a_dbg(gpu_dbg_pte, "failed to allocate pages struct");
		err = -ENOMEM;
		goto err_alloc_compbit_store;
	}

	err = gk20a_get_sgtable_from_pages(&g->dev->dev, &sgt, &pages, 0,
					   compbit_backing_size);
	if (err) {
		gk20a_dbg(gpu_dbg_pte, "could not get sg table for pages\n");
		goto err_alloc_sg_table;
	}

	/* store the parameters to gr structure */
	*gr->compbit_store.pages = pages;
	gr->compbit_store.base_iova = sg_phys(sgt->sgl);
	gr->compbit_store.size = compbit_backing_size;
	gr->compbit_store.sgt = sgt;

	return 0;

err_alloc_sg_table:
	kfree(gr->compbit_store.pages);
	gr->compbit_store.pages = NULL;
err_alloc_compbit_store:
	__free_pages(pages, order);
err_alloc_pages:
	return err;
}

static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
			     int nents, enum dma_data_direction direction,
			     struct dma_attrs *attrs)
{
	struct scatterlist *sg;
	int i;

	/* FIXME this part of code is untested */
	for_each_sg(sgl, sg, nents, i) {
		sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev);
		__dma_sync_page(page_to_phys(sg_page(sg)), sg->offset,
							sg->length, direction);
	}

static int nios2_dma_map_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction direction,
		struct dma_attrs *attrs)
{
	int i;

	for_each_sg(sg, sg, nents, i) {
		void *addr;

		addr = sg_virt(sg);
		if (addr) {
			__dma_sync_for_device(addr, sg->length, direction);
			sg->dma_address = sg_phys(sg);
		}
	}

/* Map a set of buffers described by scatterlist in streaming
 * mode for DMA.  This is the scatter-gather version of the
 * above pci_map_single interface.  Here the scatter gather list
 * elements are each tagged with the appropriate dma address
 * and length.  They are obtained via sg_dma_{address,length}(SG).
 *
 * NOTE: An implementation may be able to use a smaller number of
 *       DMA address/length pairs than there are SG table elements.
 *       (for example via virtual mapping capabilities)
 *       The routine returns the number of addr/length pairs actually
 *       used, at most nents.
 *
 * Device ownership issues as mentioned above for pci_map_single are
 * the same here.
 */
static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg,
	       int nents, int direction)
{
	struct scatterlist *s;
	int i;

	WARN_ON(nents == 0 || sg[0].length == 0);

	for_each_sg(sg, s, nents, i) {
		BUG_ON(!sg_page(s));
		s->dma_address = sg_phys(s);
		if (!check_addr("map_sg", hwdev, s->dma_address, s->length))
			return 0;
		s->dma_length = s->length;
	}

int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
		enum dma_data_direction direction)
{
	int i;

	BUG_ON(!valid_dma_direction(direction));

	for_each_sg(sg, sg, nents, i) {
		void *addr;

		addr = sg_virt(sg);
		if (addr) {
			__dma_sync_for_device(addr, sg->length, direction);
			sg->dma_address = sg_phys(sg);
		}
	}

/*
 * Create scatter-list for the already allocated DMA buffer.
 * This function could be replaced by dma_common_get_sgtable
 * as soon as it will avalaible.
 */
static int ion_cma_get_sgtable(struct device *dev, struct sg_table *sgt,
			       void *cpu_addr, dma_addr_t handle, size_t size)
{
	struct page *page = phys_to_page(dma_to_phys(dev, handle));
	struct scatterlist *sg;
	int ret;

	ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
	if (unlikely(ret))
		return ret;

	sg = sgt->sgl;
	sg_set_page(sg, page, PAGE_ALIGN(size), 0);
	sg_dma_address(sg) = sg_phys(sg);

	return 0;
}