void jabber_change_status(GGaduStatusPrototype *sp, gboolean keep_desc)
{
	enum states status;
	LmMessage *m = NULL;
	gchar *show = NULL;
	gchar *show_away = "away";
	gchar *show_xa = "xa";
	gchar *show_dnd = "dnd";
	gchar *show_chat = "chat";
	
	print_debug("jabber_change_status start");
	
	if (!sp)
	    return;
	
	status = sp->status;
	
	/* Just a simple esthetic functionality */
	if((jabber_data.status == JABBER_STATUS_UNAVAILABLE) && sp->status == JABBER_STATUS_UNAVAILABLE)
	{
		GGaduStatusPrototype *sp_temp = ggadu_find_status_prototype(p, jabber_data.status);

		sp_temp->status = JABBER_STATUS_UNAVAILABLE;
		if(sp_temp->status_description)
		{
		    g_free(sp_temp->status_description);
		    sp_temp->status_description = NULL;
		}

		signal_emit("jabber", "gui status changed", sp_temp, "main-gui");
		GGaduStatusPrototype_free(sp_temp);
		return;
	}

	if (status == JABBER_STATUS_UNAVAILABLE)
	{
		lm_connection_close(jabber_data.connection, NULL);
		return;
	}

	/* connect if switched to any other than unavailable */	
	if ((jabber_data.status == JABBER_STATUS_UNAVAILABLE) && (status != JABBER_STATUS_UNAVAILABLE) &&
	    (!jabber_data.connection || !lm_connection_is_open(jabber_data.connection) ||
	     !lm_connection_is_authenticated(jabber_data.connection)))
	{
		g_thread_create(jabber_login_connect, (gpointer) status, FALSE, NULL);
		return;
	}

	
	if (jabber_data.connection && !lm_connection_is_authenticated(jabber_data.connection))
	{
		print_debug("You are not yet authenticated!");
		return;
	}
	
	m = lm_message_new_with_sub_type(NULL, LM_MESSAGE_TYPE_PRESENCE,
					 (status == JABBER_STATUS_UNAVAILABLE) ? 
					 LM_MESSAGE_SUB_TYPE_UNAVAILABLE : LM_MESSAGE_SUB_TYPE_AVAILABLE);

	/* switch (status == JABBER_STATUS_DESCR ? jabber_data.status : status) */
	switch (status)
	{
	case JABBER_STATUS_AWAY:
		show = show_away;
		break;
	case JABBER_STATUS_XA:
		show = show_xa;
		break;
	case JABBER_STATUS_DND:
		show = show_dnd;
		break;
	case JABBER_STATUS_CHAT:
		show = show_chat;
		break;
	case JABBER_STATUS_AVAILABLE:
		show = NULL;
		break;
	default:
		break;
	}

	if (show)
		lm_message_node_add_child(m->node, "show", show);

	if(keep_desc)
	{
	    if(sp->status_description) g_free(sp->status_description);
	    sp->status_description = g_strdup(jabber_data.description);
	}

	if(jabber_data.description)
	{
	    g_free(jabber_data.description);
	    jabber_data.description = NULL;
	}

	if (sp->status_description)
	{
		print_debug("jabber: status description %s %s",sp->status_description,show);
//.........这里部分代码省略.........

//.........这里部分代码省略.........
			mode = 2;
			break;
		case CAMERA_FLASH_TORCH:
			mode = 1;
			break;
		case CAMERA_FLASH_OFF:
			mode = 4;//manual af
			break;
		case CAMERA_FLASH_AUTO:
			mode = 0;
			break;
		default:
			mode = 0;
			break;
	}
 camera_agent_set_focusmode(0,mode);
#endif

#if debug_ae_mode
u8 mode = 0;
switch(flash_mode)
	{
		case CAMERA_FLASH_ON:
			mode = 1;
			break;
		case CAMERA_FLASH_TORCH:
			mode = 2;
			break;
		case CAMERA_FLASH_OFF:
			mode = 3;
			break;
		case CAMERA_FLASH_AUTO:
			mode = 0;
			break;
		default:
			buf[0] = 1;
			break;
	}
camera_agent_set_ae_mode(0,mode);
#endif
#if debug_exposure_gain
u32 expo = 0;
u8 gain = 0;
switch(flash_mode)
	{
		case CAMERA_FLASH_ON:
			expo = 10000;
			gain = 100;
			break;
		case CAMERA_FLASH_TORCH:
			expo = 10000;
			gain = 100;
			break;
		case CAMERA_FLASH_OFF:
			expo = 10;
			gain = 100;
			break;
		case CAMERA_FLASH_AUTO:
			expo = 0;
			gain = 0;
			break;
		default:
			expo = 0;
			gain = 0;
			break;
	}
camera_agent_set_exposuretime(expo);
camera_agent_set_ADgain(gain);
#endif

	print_debug("Enter Function:%s ", __func__);
	cmd = misp_construct_opcode(OpCode,SET_CMD,sizeof(buf));

	switch(flash_mode)
	{
		case CAMERA_FLASH_ON:
			buf[0] = 8;
			break;
		case CAMERA_FLASH_TORCH:
			buf[0] = 1;
			break;
		case CAMERA_FLASH_OFF:
			buf[0] = 1;
			break;
		case CAMERA_FLASH_AUTO:
			buf[0] = 4;
			break;
		default:
			buf[0] = 4;
			break;
	}
	print_debug("flash_mode = %d ", buf[0]);

	errorcode = misp_exec_cmd(cmd,buf);
	if (errorcode) {
		print_error("%s fail, error code = %d", __func__, errorcode);
		return -1;
	}
	 return 0;
}

int mini_isp_debug_load_cfg(char *cfg_file,char *key_name,u8 *key_var)
{
	struct kstat stat;
	mm_segment_t fs;
	struct file *fp = NULL;
	int file_flag = O_RDONLY;
	ssize_t ret = 0;
	char temp_array[64] = {0};
	char temp;
	int  cnt=0;
	bool bRegStart = false;
	bool bKeyFound = false;
	bool bKeyCfg   = false;


	print_debug("enter %s", __func__);

	if (NULL == cfg_file) {
		print_error("%s cfg_file null ptr.", __func__);
		return -EINVAL;
	}

	if (NULL == key_name) {
		print_error("%s key_name null ptr.", __func__);
		return -EINVAL;
	}

	if (NULL == key_var) {
		print_error("%s key_var null ptr.", __func__);
		return -EINVAL;
	}

	/* must have the following 2 statement */
	fs = get_fs();
	set_fs(KERNEL_DS);

	fp = filp_open(cfg_file, file_flag, 0666);
	if (IS_ERR_OR_NULL(fp)) {
		print_debug("no debug configuration file(%s) - do nothing, just skip it!\n",cfg_file);
		return -1;
	}

	if (0 != vfs_stat(cfg_file, &stat)) {
		print_error("failed to get file %s state!",cfg_file);
		goto ERROR;
	}

	print_debug("%s size : %d",cfg_file, (u32)stat.size);

	while (0 < vfs_read(fp, &temp, 1, &fp->f_pos)) {
		switch (temp) {
		case '{':
			bRegStart = true;
			cnt       = 0;
			bKeyFound = false;
			memset(temp_array,sizeof(char),sizeof(temp_array));
			break;
		case '}':
			bRegStart = false;
			if(bKeyFound)
			{
			    *key_var = mini_atoi16(temp_array);
	            bKeyCfg  = true;
			    print_debug("%s:0x%x",key_name,*key_var);
			}
			break;
		case '=':
		    if (bRegStart)
		    {
		        bKeyFound = false;
		        if (0 == strncmp(key_name,temp_array,strlen(key_name)))
		        {
                    bKeyFound = true;
		        }
		        cnt = 0;
		    }
		    break;
		default:
		    if (bRegStart){
    		    if (cnt >= 64)
    		    {
    		        bRegStart = false;
    		    }
    		    else
    		    {
    		        temp_array[cnt] = temp;
    		        cnt=cnt+1;
    		    }
		    }
		    break;
		}

		if (bKeyCfg)
		{
		    break;
		}
	}

	/* must have the following 1 statement */
	set_fs(fs);
//.........这里部分代码省略.........

static void maxRdLatencyTrain_D(struct MCTStatStruc *pMCTstat,
					struct DCTStatStruc *pDCTstat)
{
	u8 Channel;
	u32 TestAddr0;
	u8 _DisableDramECC = 0, _Wrap32Dis = 0, _SSE2 = 0;
	u16 MaxRdLatDly;
	u8 RcvrEnDly = 0;
	u32 PatternBuffer[60];	// FIXME: why not 48 + 4
	u32 Margin;
	u32 addr;
	u32 cr4;
	u32 lo, hi;

	u8 valid;
	u32 pattern_buf;

	cr4 = read_cr4();
	if(cr4 & (1<<9)) {		/* save the old value */
		_SSE2 = 1;
	}
	cr4 |= (1<<9);			/* OSFXSR enable SSE2 */
	write_cr4(cr4);

	addr = HWCR;
	_RDMSR(addr, &lo, &hi);
	if(lo & (1<<17)) {		/* save the old value */
		_Wrap32Dis = 1;
	}
	lo |= (1<<17);			/* HWCR.wrap32dis */
	lo &= ~(1<<15);			/* SSEDIS */
	/* Setting wrap32dis allows 64-bit memory references in
	   real mode */
	_WRMSR(addr, lo, hi);

	_DisableDramECC = mct_DisableDimmEccEn_D(pMCTstat, pDCTstat);

	pattern_buf = SetupMaxRdPattern(pMCTstat, pDCTstat, PatternBuffer);

	for (Channel = 0; Channel < 2; Channel++) {
		print_debug_dqs("\tMaxRdLatencyTrain51: Channel ",Channel, 1);
		pDCTstat->Channel = Channel;

		if( (pDCTstat->Status & (1 << SB_128bitmode)) && Channel)
			break;		/*if ganged mode, skip DCT 1 */

		TestAddr0 = GetMaxRdLatTestAddr_D(pMCTstat, pDCTstat, Channel, &RcvrEnDly,	 &valid);
		if(!valid)	/* Address not supported on current CS */
			continue;
		/* rank 1 of DIMM, testpattern 0 */
		WriteMaxRdLat1CLTestPattern_D(pattern_buf, TestAddr0);

		MaxRdLatDly = mct_GetStartMaxRdLat_D(pMCTstat, pDCTstat, Channel, RcvrEnDly, &Margin);
		print_debug_dqs("\tMaxRdLatencyTrain52:  MaxRdLatDly start ", MaxRdLatDly, 2);
		print_debug_dqs("\tMaxRdLatencyTrain52:  MaxRdLatDly Margin ", Margin, 2);
		while(MaxRdLatDly < MAX_RD_LAT) {	/* sweep Delay value here */
			mct_setMaxRdLatTrnVal_D(pDCTstat, Channel, MaxRdLatDly);
			ReadMaxRdLat1CLTestPattern_D(TestAddr0);
			if( CompareMaxRdLatTestPattern_D(pattern_buf, TestAddr0) == DQS_PASS)
				break;
			SetTargetWTIO_D(TestAddr0);
			FlushMaxRdLatTestPattern_D(TestAddr0);
			ResetTargetWTIO_D();
			MaxRdLatDly++;
		}
		print_debug_dqs("\tMaxRdLatencyTrain53:  MaxRdLatDly end ", MaxRdLatDly, 2);
		mct_setMaxRdLatTrnVal_D(pDCTstat, Channel, MaxRdLatDly + Margin);
	}

	if(_DisableDramECC) {
		mct_EnableDimmEccEn_D(pMCTstat, pDCTstat, _DisableDramECC);
	}

	if(!_Wrap32Dis) {
		addr = HWCR;
		_RDMSR(addr, &lo, &hi);
		lo &= ~(1<<17);	/* restore HWCR.wrap32dis */
		_WRMSR(addr, lo, hi);
	}
	if(!_SSE2){
		cr4 = read_cr4();
		cr4 &= ~(1<<9);	/* restore cr4.OSFXSR */
		write_cr4(cr4);
	}

#if DQS_TRAIN_DEBUG > 0
	{
		u8 Channel;
		print_debug("maxRdLatencyTrain: CH_MaxRdLat:\n");
		for(Channel = 0; Channel<2; Channel++) {
			print_debug("Channel:"); print_debug_hex8(Channel);
			print_debug(": ");
			print_debug_hex8( pDCTstat->CH_MaxRdLat[Channel] );
			print_debug("\n");
		}
	}
#endif

}

/*---------------------------------------------------------------------------*/
static void
handle_incoming_rrep(void)
{
  struct uaodv_msg_rrep *rm = (struct uaodv_msg_rrep *)uip_appdata;
  struct uaodv_rt_entry *rt;

  /* Useless HELLO message? */
  if(uip_ipaddr_cmp(&BUF->destipaddr, &uip_broadcast_addr)) {
#ifdef AODV_RESPOND_TO_HELLOS
    u32_t net_seqno;
#ifdef CC2420_RADIO
    int ret = cc2420_check_remote(uip_udp_sender()->u16[1]);

    if(ret == REMOTE_YES) {
      print_debug("HELLO drop is remote\n");
      return;
    } else if (ret == REMOTE_NO) {
      /* Is neigbour, accept it. */
    } else if(cc2420_last_rssi < RSSI_THRESHOLD) {
      print_debug("HELLO drop %d %d\n", cc2420_last_rssi, cc2420_last_correlation);
      return;
    }
#endif
    /* Sometimes it helps to send a non-requested RREP in response! */
    net_seqno = htonl(my_hseqno);
    send_rrep(&uip_hostaddr, &BUF->srcipaddr, &BUF->srcipaddr, &net_seqno, 0);
#endif
    return;
  }

  print_debug("RREP %d.%d.%d.%d -> %d.%d.%d.%d"
	      " dest=%d.%d.%d.%d seq=%lu hops=%u orig=%d.%d.%d.%d\n",
	      uip_ipaddr_to_quad(&BUF->srcipaddr),
	      uip_ipaddr_to_quad(&BUF->destipaddr),
	      uip_ipaddr_to_quad(&rm->dest_addr), ntohl(rm->dest_seqno),
	      rm->hop_count,
	      uip_ipaddr_to_quad(&rm->orig_addr));

  rt = uaodv_rt_lookup(&rm->dest_addr);

  /* New forward route? */
  if(rt == NULL || (SCMP32(ntohl(rm->dest_seqno), rt->hseqno) > 0)) {
    print_debug("Inserting3\n");
    rt = uaodv_rt_add(&rm->dest_addr, uip_udp_sender(),
		      rm->hop_count, &rm->dest_seqno);
#ifdef CC2420_RADIO
    /* This link is ok since he is unicasting back to us! */
    cc2420_recv_ok(uip_udp_sender());
    print_debug("RREP recv ok %d %d\n",
		cc2420_last_rssi, cc2420_last_correlation);
#endif
  } else {
    print_debug("Not inserting\n");
  }

  /* Forward RREP towards originator? */
  if(uip_ipaddr_cmp(&rm->orig_addr, &uip_hostaddr)) {
    print_debug("ROUTE FOUND\n");
    if(rm->flags & UAODV_RREP_ACK) {
      struct uaodv_msg_rrep_ack *ack = (void *)uip_appdata;
      ack->type = UAODV_RREP_ACK_TYPE;
      ack->reserved = 0;
      sendto(uip_udp_sender(), ack, sizeof(*ack));
    }
  } else {
    rt = uaodv_rt_lookup(&rm->orig_addr);

    if(rt == NULL) {
      print_debug("RREP received, but no route back to originator... :-( \n");
      return;
    }

    if(rm->flags & UAODV_RREP_ACK) {
      print_debug("RREP with ACK request (ignored)!\n");
      /* Don't want any RREP-ACKs in return! */
      rm->flags &= ~UAODV_RREP_ACK;
    }

    rm->hop_count++;

    print_debug("Fwd RREP to %d.%d.%d.%d\n", uip_ipaddr_to_quad(&rt->nexthop));

    sendto(&rt->nexthop, rm, sizeof(struct uaodv_msg_rrep));
  }
}

void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
	static const uint16_t spd_addr [] = {
		// Node 0
		DIMM0, DIMM2, 0, 0,
		DIMM1, DIMM3, 0, 0,
		// Node 1
		DIMM4, DIMM6, 0, 0,
		DIMM5, DIMM7, 0, 0,
	};

        struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
        int needs_reset = 0;
        unsigned bsp_apicid = 0;
	uint8_t tmp = 0;

        if (!cpu_init_detectedx && boot_cpu()) {
		/* Nothing special needs to be done to find bus 0 */
		/* Allow the HT devices to be found */
		enumerate_ht_chain();
		sio_setup();
        }

        if (bist == 0)
		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);

	pnp_enter_ext_func_mode(SERIAL_DEV);
	/* The following line will set CLKIN to 24 MHz, external */
	pnp_write_config(SERIAL_DEV, IT8716F_CONFIG_REG_CLOCKSEL, 0x11);
	tmp = pnp_read_config(SERIAL_DEV, IT8716F_CONFIG_REG_SWSUSP);
	/* Is serial flash enabled? Then enable writing to serial flash. */
	if (tmp & 0x0e) {
		pnp_write_config(SERIAL_DEV, IT8716F_CONFIG_REG_SWSUSP, tmp | 0x10);
		pnp_set_logical_device(GPIO_DEV);
		/* Set Serial Flash interface to 0x0820 */
		pnp_write_config(GPIO_DEV, 0x64, 0x08);
		pnp_write_config(GPIO_DEV, 0x65, 0x20);
	}
 	it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE);
	pnp_exit_ext_func_mode(SERIAL_DEV);

        setup_mb_resource_map();

        console_init();

	/* Halt if there was a built in self test failure */
	report_bist_failure(bist);

	printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);

        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");

#if CONFIG_MEM_TRAIN_SEQ == 1
        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
#endif
        setup_coherent_ht_domain(); // routing table and start other core0

        wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
        // It is said that we should start core1 after all core0 launched
        /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,
         * So here need to make sure last core0 is started, esp for two way system,
         * (there may be apic id conflicts in that case)
         */
        start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
#endif

        /* it will set up chains and store link pair for optimization later */
        ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn

#if CONFIG_SET_FIDVID
        {
                msr_t msr;
                msr=rdmsr(0xc0010042);
                print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
        }
        enable_fid_change();
        enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
        init_fidvid_bsp(bsp_apicid);
        // show final fid and vid
        {
                msr_t msr;
                msr=rdmsr(0xc0010042);
                print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
        }
#endif

	init_timer(); // Need to use TMICT to synconize FID/VID

        needs_reset |= optimize_link_coherent_ht();
        needs_reset |= optimize_link_incoherent_ht(sysinfo);
        needs_reset |= mcp55_early_setup_x();

        // fidvid change will issue one LDTSTOP and the HT change will be effective too
        if (needs_reset) {
                print_info("ht reset -\n");
              	soft_reset();
        }
//.........这里部分代码省略.........

//.........这里部分代码省略.........
	conf.beginGroup("Engine");
	setExitsCheck( conf.value("checkExits", false).toBool() );
	setTerrainCheck( conf.value("checkTerrain", true).toBool() );
	setBriefMode( conf.value("briefmode", true ).toBool() );
	setAutomerge( conf.value("autoMerge", true ).toBool() );
	setAngrylinker( conf.value("angryLinker", true ).toBool() );
	setDuallinker( conf.value("dualLinker", false ).toBool() );
	setAutorefresh( conf.value("autoRefresh", true ).toBool() );
	setNameQuote( conf.value("roomNameQuote", 10 ).toInt() );
	setDescQuote( conf.value("descQuote", 10 ).toInt() );
	setRegionsAutoReplace( conf.value("regionsAutoReplace", false ).toBool() );
	setRegionsAutoSet( conf.value("regionsAutoSet", false ).toBool() );
	setMactionUsesPrespam( conf.value("mactionUsesPrespam", true).toBool() );
	setPrespamTTL( conf.value("prespamTTL", 5000).toInt() );

	conf.endGroup();

    conf.beginGroup("Patterns");
    setExitsPattern( conf.value("exitsPattern", "Exits: ").toByteArray() );
    spells_pattern = conf.value("spellsEffectPattern", "Affected by:").toByteArray();
    setScorePattern( conf.value("scorePattern", "[0-9]*/* hits, */* mana, and */* moves.").toByteArray()  );
    setShortScorePattern( conf.value("scorePatternShort", "[0-9]*/* hits and */* moves.").toByteArray() );
	conf.endGroup();


	conf.beginGroup("GroupManager");
	setGroupManagerHost( conf.value("remoteHost", "localhost").toByteArray() );
	setGroupManagerRemotePort( conf.value("remotePort", 4243 ).toInt() );
	setGroupManagerLocalPort( conf.value("localServerPort", 4243 ).toInt() );
	setGroupManagerCharName( conf.value("charName", "Charname" ).toByteArray() );
	setGroupManagerColor( QColor( conf.value("charColor", "#F28003").toString() ) );
	setGroupManagerShowSelf( conf.value("showSelf", false ).toBool() );
	setGroupManagerNotifyArmour( conf.value("notifyArm", true ).toBool() );
	setGroupManagerNotifySanc( conf.value("notifySanc", true ).toBool() );
	setGroupManagerNotifyBash( conf.value("notifyBash", true ).toBool() );
	setGroupManagerShowManager( conf.value("showGroupManager", true ).toBool() );
	setGroupManagerRect( conf.value("windowRect").toRect() );
	conf.endGroup();


	size = conf.beginReadArray("Spells");
	for (int i = 0; i < size; ++i) {
	  conf.setArrayIndex(i);
	  TSpell spell;

      spell.up = false;
      spell.silently_up = false;
	  spell.addon = conf.value("addon", 0).toBool();
	  spell.name = conf.value("name").toByteArray();
	  spell.up_mes = conf.value("upMessage").toByteArray();
	  spell.refresh_mes = conf.value("refreshMessage").toByteArray();
	  spell.down_mes = conf.value("downMessage").toByteArray();

      addSpell(spell);
	}
	conf.endArray();


	conf.beginGroup("Movement tracking");
	size = conf.beginReadArray("Cancel Patterns");
	for (int i = 0; i < size; ++i) {
	  conf.setArrayIndex(i);
	  moveCancelPatterns.append( conf.value("pattern").toByteArray() );
	}
	conf.endArray();
	size = conf.beginReadArray("Force Patterns");
	for (int i = 0; i < size; ++i) {
	  conf.setArrayIndex(i);
	  moveForcePatterns.append( conf.value("pattern").toByteArray() );
	}
	conf.endArray();
	conf.endGroup();

	size = conf.beginReadArray("Debug Settings");
	for (int i = 0; i < size; ++i) {
	  conf.setArrayIndex(i);

      QString s = conf.value("name").toString();

	  unsigned int z = 0;
      while (debug_data[z].name != NULL) {
          if (debug_data[z].name == s)
              break;
          z++;
      }
      if (debug_data[z].name == NULL) {
          print_debug(DEBUG_CONFIG, "Warning, %s is a wrong debug descriptor/name!", qPrintable(s));
          continue;
      }

      debug_data[i].state = conf.value("state", 0 ).toInt();
	}
	conf.endArray();

	configFile = filename;
	configPath = path;

	setConfigModified(false);
	return true;
}

void CEngine::tryDir()
{
    unsigned int i;
    CRoom *room;
    CRoom *candidate;

    nameMatch = 0;
    descMatch = 0;

    print_debug(DEBUG_ANALYZER, "in try_dir");
    ExitDirection dir = numbydir(event.dir[0]);
    if (dir == ED_UNKNOWN) {
        print_debug(DEBUG_ANALYZER, "Error in try_dir - faulty DIR given as input!\r\n");
        return;
    }

    CCommand cmd = commandQueue.peek();
    if (cmd.timer.elapsed() > conf->getPrespamTTL() ) {
        print_debug(DEBUG_ANALYZER, "The command queue has head entry with lifetime over limit. Resetting");
    	commandQueue.clear();
    	toggle_renderer_reaction();
    } else if (cmd.dir == dir && !event.fleeing ) {
    	// we moved in awaited direction
    	commandQueue.dequeue();
    }


    if (stacker.amount() == 0) {
        print_debug(DEBUG_ANALYZER, "leaving. No candidates in stack to check. This results in FULL RESYNC.");
        return;
    }

    for (i = 0; i < stacker.amount(); i++) {
        room = stacker.get(i);
        if (room->isConnected(dir)) {
            candidate = room->getExitRoom(dir);
            if  (testRoom(candidate) ) {
                stacker.put(candidate);
            }

        } else {
            if (stacker.amount() == 1 && mapping)  {
                print_debug(DEBUG_ANALYZER, "Going to add new room...");
                mapCurrentRoom(room, dir);
                return;
            }
        }

    }

    /* roomname update */
    if (stacker.next() == 1) {
        /* this means we have exactly one match */
//        printf("nameMatch %i, descMatch %i\r\n", nameMatch, descMatch);
        if (nameMatch > 0) {
            /* Autorefresh only if case has been changed. */
            if (conf->getAutorefresh() && event.name.toLower() == stacker.nextFirst()->getName().toLower()) {
                send_to_user("--[ (AutoRefreshed) not exact room name match: %i errors.\r\n", nameMatch);
                stacker.nextFirst()->setName(event.name);
            } else {
                send_to_user("--[ not exact room name match: %i errors. Use 'mrefresh' to fix it!\r\n", nameMatch);
            }
        }
        if (conf->getAutorefresh() && descMatch > 0) {
            send_to_user("--[ (AutoRefreshed) not exact room desc match: %i errors.\r\n", descMatch);
            stacker.nextFirst()->setDesc(event.desc);
        } else if (!conf->getAutorefresh() && descMatch > 0) {
            send_to_user("--[ not exact room desc match: %i errors.\r\n", descMatch);
        }
    }


    print_debug(DEBUG_ANALYZER, "leaving tryDir");
}

void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
	u32 val;

	post_code(0x30);
	agesawrapper_amdinitmmio();
	post_code(0x31);

	/* Halt if there was a built in self test failure */
	post_code(0x33);
	report_bist_failure(bist);

	sb7xx_51xx_enable_wideio(0, 0x1600); /* though UARTs are on the NUVOTON BMC */
	wpcm450_enable_dev(WPCM450_SP1, 0x164E, CONFIG_TTYS0_BASE);
	sb7xx_51xx_disable_wideio(0);
	post_code(0x34);

	post_code(0x35);
	console_init();

	val = cpuid_eax(1);
	printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);

	post_code(0x37);
	val = agesawrapper_amdinitreset();
	if (val) {
		printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val);
	} else {
		printk(BIOS_DEBUG, "agesawrapper_amdinitreset passed\n");
	}

	if (!cpu_init_detectedx && boot_cpu()) {
		post_code(0x38);
		/*
		 * SR5650/5670/5690 RD890 chipset, read pci config space hang at POR,
		 * Disable all Pcie Bridges to work around It.
		 */
		sr56x0_rd890_disable_pcie_bridge();
		post_code(0x39);
		nb_Poweron_Init();
		post_code(0x3A);
		sb_Poweron_Init();
	}
	post_code(0x3B);
	val = agesawrapper_amdinitearly();
	if(val) {
		printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val);
	} else {
		printk(BIOS_DEBUG, "agesawrapper_amdinitearly passed\n");
	}

	post_code(0x3C);
	nb_Ht_Init();

	post_code(0x3D);
	/* Reset for HT, FIDVID, PLL and ucode patch(errata) changes to take affect. */
	if (!warm_reset_detect(0)) {
		print_info("...WARM RESET...\n\n\n");
		distinguish_cpu_resets(0);
		soft_reset();
		die("After soft_reset_x - shouldn't see this message!!!\n");
	}

	post_code(0x40);
	val = agesawrapper_amdinitpost();
	if (val) {
		printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n", val);
	} else {
		printk(BIOS_DEBUG, "agesawrapper_amdinitpost passed\n");
	}

	post_code(0x41);
	val = agesawrapper_amdinitenv();
	if(val) {
		printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n", val);
	}
	printk(BIOS_DEBUG, "agesawrapper_amdinitenv passed\n");

	post_code(0x42);

	post_code(0x50);
	print_debug("Disabling cache as ram ");
	disable_cache_as_ram();
	print_debug("done\n");

	post_code(0x51);
	copy_and_run();

	/* We will not return,  Should never see this message and post code. */
	print_debug("should not be here -\n");
	post_code(0x54);
}

/**
 * Executes a rule. Contains evaluation of all conditions prior
 * to execution.
 *
 * @1 Hotplug event structure
 * @2 The rule to be executed
 *
 * Returns: 0 if success, -1 if the whole event is to be 
 * discared, 1 if bail out of this particular rule was required
 */
int rule_execute(struct hotplug2_event_t *event, struct rule_t *rule) {
	int i, last_rv, res;
	char **env;
	
	for (i = 0; i < rule->conditions_c; i++) {
		if (rule_condition_eval(event, &(rule->conditions[i])) != EVAL_MATCH)
			return 0;
	}
	
	res = 0;
	last_rv = 0;
	
	env = xmalloc(sizeof(char *) * event->env_vars_c);
	for (i = 0; i < event->env_vars_c; i++) {
		env[i] = alloc_env(event->env_vars[i].key, event->env_vars[i].value);
		putenv(env[i]);
	}
	
	for (i = 0; i < rule->actions_c; i++) {
		switch (rule->actions[i].type) {
			case ACT_STOP_PROCESSING:
				res = 1;
				break;
			case ACT_STOP_IF_FAILED:
				if (last_rv != 0)
					res = 1;
				break;
			case ACT_NEXT_EVENT:
				res = -1;
				break;
			case ACT_NEXT_IF_FAILED:
				if (last_rv != 0)
					res = -1;
				break;
			case ACT_MAKE_DEVICE:
				last_rv = make_dev_from_event(event, rule->actions[i].parameter[0], strtoul(rule->actions[i].parameter[1], NULL, 0));
				break;
			case ACT_CHMOD:
				last_rv = chmod_file(event, rule->actions[i].parameter[0], rule->actions[i].parameter[1]);
				break;
			case ACT_CHOWN:
			case ACT_CHGRP:
				last_rv = chown_chgrp(event, rule->actions[i].type, rule->actions[i].parameter[0], rule->actions[i].parameter[1]);
				break;
			case ACT_SYMLINK:
				last_rv = make_symlink(event, rule->actions[i].parameter[0], rule->actions[i].parameter[1]);
				break;
			case ACT_RUN_SHELL:
				last_rv = exec_shell(event, rule->actions[i].parameter[0]);
				break;
			case ACT_RUN_NOSHELL:
				last_rv = exec_noshell(event, rule->actions[i].parameter[0], rule->actions[i].parameter);
				break;
			case ACT_SETENV:
				last_rv = setenv(rule->actions[i].parameter[0], rule->actions[i].parameter[1], 1);
				break;
			case ACT_REMOVE:
				last_rv = unlink(rule->actions[i].parameter[0]);
				rmdir_p(rule->actions[i].parameter[0]);
				break;
			case ACT_DEBUG:
				print_debug(event);
				last_rv = 0;
				break;
		}
		if (res != 0)
			break;
	}
	
	for (i = 0; i < event->env_vars_c; i++) {
		unsetenv(event->env_vars[i].key);
		free(env[i]);
	}
	free(env);
	
	return res;
}

static unsigned int bcm2835_cpufreq_driver_get(unsigned int cpu)
{
	unsigned int actual_rate = bcm2835_cpufreq_get_clock(RPI_FIRMWARE_GET_CLOCK_RATE);
	print_debug("cpu%d: freq=%d\n", cpu, actual_rate);
	return actual_rate <= bcm2835_freq_table[0].frequency ? bcm2835_freq_table[0].frequency : bcm2835_freq_table[1].frequency;
}

/*
 =============
  Module exit
 =============
*/
static void __exit bcm2835_cpufreq_module_exit(void)
{
	print_debug("IN\n");
	cpufreq_unregister_driver(&bcm2835_cpufreq_driver);
	return;
}

/*
 ====================================================
  Module Initialisation registers the cpufreq driver
 ====================================================
*/
static int __init bcm2835_cpufreq_module_init(void)
{
	print_debug("IN\n");
	return cpufreq_register_driver(&bcm2835_cpufreq_driver);
}

static void vt8237s_vlink_init(struct device *dev)
{
	u8 reg;
	device_t devfun7;

	devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
				  PCI_DEVICE_ID_VIA_K8T800_NB_SB_CTR, 0);
	if (!devfun7)
		devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8M800_NB_SB_CTR, 0);
	if (!devfun7)
		devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8T890CE_7, 0);
	if (!devfun7)
		devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8M890CE_7, 0);
	if (!devfun7)
		devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8T890CF_7, 0);
	/* No pairing NB was found. */
	if (!devfun7)
	{
		print_debug("vt8237s_vlink_init: No pairing NB was found.\n");
		return;
	}

	/*
	 * This init code is valid only for the VT8237S! For different
	 * sounthbridges (e.g. VT8237A, VT8237S, VT8237R (without plus R)
	 * and VT8251) a different init code is required.
	 */

	/* disable auto disconnect */
	reg = pci_read_config8(devfun7, 0x42);
	reg &= ~0x4;
	pci_write_config8(devfun7, 0x42, reg);

	/* NB part setup */
	pci_write_config8(devfun7, 0xb5, 0x66);
	pci_write_config8(devfun7, 0xb6, 0x66);
	pci_write_config8(devfun7, 0xb7, 0x64);

	reg = pci_read_config8(devfun7, 0xb4);
	reg |= 0x1;
	reg &= ~0x10;
	pci_write_config8(devfun7, 0xb4, reg);

	pci_write_config8(devfun7, 0xb0, 0x6);
	pci_write_config8(devfun7, 0xb1, 0x1);

	/* SB part setup */
	pci_write_config8(dev, 0xb7, 0x60);
	pci_write_config8(dev, 0xb9, 0x88);
	pci_write_config8(dev, 0xba, 0x88);
	pci_write_config8(dev, 0xbb, 0x89);

	reg = pci_read_config8(dev, 0xbd);
	reg |= 0x3;
	reg &= ~0x4;
	pci_write_config8(dev, 0xbd, reg);

	reg = pci_read_config8(dev, 0xbc);
	reg &= ~0x7;
	pci_write_config8(dev, 0xbc, reg);

	/* Program V-link 8X 8bit full duplex, parity enabled.  */
	pci_write_config8(dev, 0x48, 0x23 | 0x80);

	/* enable auto disconnect, for STPGNT and HALT */
	reg = pci_read_config8(devfun7, 0x42);
	reg |= 0x7;
	pci_write_config8(devfun7, 0x42, reg);

}

static void vt8237a_vlink_init(struct device *dev)
{
	u8 reg;
	device_t devfun7;

	devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
				  PCI_DEVICE_ID_VIA_K8T800_NB_SB_CTR, 0);
	if (!devfun7)
		devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8M800_NB_SB_CTR, 0);
	if (!devfun7)
		devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8T890CE_7, 0);
	if (!devfun7)
		devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8M890CE_7, 0);
	if (!devfun7)
		devfun7 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8T890CF_7, 0);
	/* No pairing NB was found. */
	if (!devfun7)
	{
		print_debug("vt8237a_vlink_init: No pairing NB was found.\n");
		return;
	}

	/*
	 * This init code is valid only for the VT8237A! For different
	 * sounthbridges (e.g. VT8237S, VT8237R and VT8251) a different
	 * init code is required.
	 *
	 * FIXME: This is based on vt8237r_vlink_init() in
	 *        k8t890/k8t890_ctrl.c and modified to fit what the AMI
	 *        BIOS on my M2V wrote to these registers (by looking
	 *        at lspci -nxxx output).
	 *        Works for me.
	 */

	/* disable auto disconnect */
	reg = pci_read_config8(devfun7, 0x42);
	reg &= ~0x4;
	pci_write_config8(devfun7, 0x42, reg);

	/* NB part setup */
	pci_write_config8(devfun7, 0xb5, 0x88);
	pci_write_config8(devfun7, 0xb6, 0x88);
	pci_write_config8(devfun7, 0xb7, 0x61);

	reg = pci_read_config8(devfun7, 0xb4);
	reg |= 0x11;
	pci_write_config8(devfun7, 0xb4, reg);

	pci_write_config8(devfun7, 0xb0, 0x6);
	pci_write_config8(devfun7, 0xb1, 0x1);

	/* SB part setup */
	pci_write_config8(dev, 0xb7, 0x50);
	pci_write_config8(dev, 0xb9, 0x88);
	pci_write_config8(dev, 0xba, 0x8a);
	pci_write_config8(dev, 0xbb, 0x88);

	reg = pci_read_config8(dev, 0xbd);
	reg |= 0x3;
	reg &= ~0x4;
	pci_write_config8(dev, 0xbd, reg);

	reg = pci_read_config8(dev, 0xbc);
	reg &= ~0x7;
	pci_write_config8(dev, 0xbc, reg);

	pci_write_config8(dev, 0x48, 0x23);

	/* enable auto disconnect, for STPGNT and HALT */
	reg = pci_read_config8(devfun7, 0x42);
	reg |= 0x7;
	pci_write_config8(devfun7, 0x42, reg);
}

static void aza_init(struct device *dev)
{
        u32 base;
        struct resource *res;
        u32 codec_mask;

        print_debug("AZALIA_INIT:---------->\n");

//-------------- enable AZA (SiS7502) -------------------------
{
        u8  temp8;
        int i=0;
        while(SiS_SiS7502_init[i][0] != 0)
        {
                temp8 = pci_read_config8(dev, SiS_SiS7502_init[i][0]);
                temp8 &= SiS_SiS7502_init[i][1];
                temp8 |= SiS_SiS7502_init[i][2];
                pci_write_config8(dev, SiS_SiS7502_init[i][0], temp8);
                i++;
        };
}
//-----------------------------------------------------------


        // put audio to D0 state
        pci_write_config8(dev, 0x54,0x00);

#if DEBUG_AZA
{
        int i;

        print_debug("****** Azalia PCI config ******");
        print_debug("\n    03020100  07060504  0B0A0908  0F0E0D0C");

        for(i=0;i<0xff;i+=4){
                if((i%16)==0){
                        print_debug("\n");
                        print_debug_hex8(i);
                        print_debug(": ");
                }
                print_debug_hex32(pci_read_config32(dev,i));
                print_debug("  ");
        }
        print_debug("\n");
}
#endif

	res = find_resource(dev, 0x10);
	if(!res)
		return;

	base = res->base;
	printk(BIOS_DEBUG, "base = 0x%08x\n", base);

	codec_mask = codec_detect(base);

	if(codec_mask) {
		printk(BIOS_DEBUG, "codec_mask = %02x\n", codec_mask);
		codecs_init(base, codec_mask);
	}

        print_debug("AZALIA_INIT:<----------\n");
}

/* ********************************
    
    Multiplicative model for the placement of
    a file at a given depth taking into
    account the mean bytes at the depth
    and the count of files at that depth

   ********************************/
int fn_depthsize_prob (long double filesize) {

    double meansizediff[DEPTH_ENTRIES];
    double final_prob[DEPTH_ENTRIES];
    double totalsize_prob=0, totalprob=0;
    double sum1=0, sum2=0, sum3=0;
    int i =0;
    float token_until_now=0;
    int token;
    int factor = 100000;
    double depthsize_prob[DEPTH_ENTRIES];
    
    srand(deseeder());

    if(filesize ==0) 
        return rand()%max_dir_depth+1;

    for(i=0; i< DEPTH_ENTRIES; i++) {
        meansizediff[i]=(double) 1/fabsl(log2l(filesize)-(long double)depth_meansize[i]);
        
        print_debug(0,"%Lf %Lf %f\n", log2l(filesize), (long double)depth_meansize[i], meansizediff[i]);
        totalsize_prob+=meansizediff[i];
    }
    
    for(i=0; i< DEPTH_ENTRIES; i++) {
        final_prob[i]=(depthcount_prob[i]/Total_depthcount_prob)*\
            (meansizediff[i]/totalsize_prob);
    }
    
    for(i=0; i< DEPTH_ENTRIES; i++) {
        totalprob+=final_prob[i];
    }
    
    for(i=0; i< DEPTH_ENTRIES; i++) {
        print_debug(0, "Probsize[%d] %f; Probcount %f; Finalprob %f\n", i+1, \
            meansizediff[i]/totalsize_prob*100, depthcount_prob[i]/Total_depthcount_prob*100,\
                final_prob[i]/totalprob*100);
        sum1+= meansizediff[i]/totalsize_prob;
        sum2+= depthcount_prob[i]/Total_depthcount_prob;
        sum3+= final_prob[i]/totalprob;
    }
    print_debug(0,"sums %f, sumc %f sumt %f\n", sum1, sum2, sum3);
    
    i=0;
    do {
        token_until_now=0;
        token = rand() % factor;
        i=0;
        token_until_now=final_prob[i]/totalprob*factor;
        while (token_until_now < token) {
            print_debug(0,"%f %d\n", token_until_now , token);
            i++;
            token_until_now+=final_prob[i]/totalprob*factor;
        }
        if(i== DEPTH_ENTRIES-1) { // last bin is actually 20 to infinite ..not just 20
            i+= rand()%10;        // e.g., any depth between 20 and 30, if DEPTH_ENTRIES=20
        }
        print_debug(0,"Chosen %d, max_dir %d\n", i, max_dir_depth);
    }
    while(i > max_dir_depth);
    
    return i+1;
}

void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
	u32 val;

	post_code(0x30);
	agesawrapper_amdinitmmio();
	post_code(0x31);

	/* Halt if there was a built in self test failure */
	post_code(0x33);
	report_bist_failure(bist);

	sb7xx_51xx_enable_wideio(0, 0x1600); /* though UARTs are on the NUVOTON BMC */
	w83627dhg_set_clksel_48(DUMMY_DEV);
	w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	sb7xx_51xx_disable_wideio(0);
	post_code(0x34);

	uart_init();
	post_code(0x35);
	console_init();

	val = cpuid_eax(1);
	printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);

	post_code(0x37);
	val = agesawrapper_amdinitreset();
	if (val) {
		printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val);
	} else {
		printk(BIOS_DEBUG, "agesawrapper_amdinitreset passed\n");
	}

	if (!cpu_init_detectedx && boot_cpu()) {
		post_code(0x38);
		/*
		 * SR5650/5670/5690 RD890 chipset, read pci config space hang at POR,
		 * Disable all Pcie Bridges to work around It.
		 */
		sr56x0_rd890_disable_pcie_bridge();
		post_code(0x39);
		nb_Poweron_Init();
		post_code(0x3A);
		sb_Poweron_Init();
	}
	post_code(0x3B);
	val = agesawrapper_amdinitearly();
	if(val) {
		printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val);
	} else {
		printk(BIOS_DEBUG, "agesawrapper_amdinitearly passed\n");
	}

	post_code(0x3C);
	/* W83627DHG pin89,90 function select is RSTOUT3#, RSTOUT2# by default.
	 * In order to access W83795G/ADG HWM using I2C protocol,
	 * we select function to SDA, SCL function (or GP33, GP32 function).
	 */
	w83627dhg_enable_i2c(PNP_DEV(0x2E, W83627DHG_SPI));

	nb_Ht_Init();
	post_code(0x3D);
	/* Reset for HT, FIDVID, PLL and ucode patch(errata) changes to take affect. */
	if (!warm_reset_detect(0)) {
		print_info("...WARM RESET...\n\n\n");