void EXTI0_IRQHandler(void) {
	if (EXTI_GetITStatus(EXTI_Line0 ) != RESET) {
		portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
		unsigned long ulDummy;
		ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
		{
			uint8_t buffer[6];
			LIS302DL_Read(buffer, LIS302DL_OUT_X_ADDR, 6);
			xQueueSendFromISR(queue, &(buffer[4]), &xHigherPriorityTaskWoken);
			EXTI_ClearITPendingBit(EXTI_Line0 );
		}
		portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy);
		portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
	}
}

/**
 * \brief Handler for Sytem Tick interrupt.
 */
void xPortSysTickHandler(void)
{
	unsigned portLONG ulDummy;

	/* If using preemption, also force a context switch. */
#if configUSE_PREEMPTION == 1
	*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
#endif

	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		vTaskIncrementTick();
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR(ulDummy);
}

void xPortSysTickHandler( void )
{
uint32_t ulPreviousMask;
        NRF_RTC1->EVENTS_TICK = 0;
	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
		{
			/* Pend a context switch. */
			*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
}

void __attribute__ ((interrupt)) __cs3_isr_interrupt_119( void )
{
unsigned portLONG ulSavedInterruptMask;

	/* Clear the PIT0 interrupt. */
	MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;

	/* Increment the RTOS tick. */
	ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
		if( xTaskIncrementTick() != pdFALSE )
		{
			taskYIELD();
		}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
}

void xPortSysTickHandler( void )
{
uint32_t ulDummy;

	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
		{
			/* Pend a context switch. */
			*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
}

void xPortSysTickHandler( void )
{
unsigned long ulPreviousMask;

	ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
		{
			/* Pend a context switch. */
			*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
}

unsigned long ulMainGetRunTimeCounterValue( void )
{
unsigned long ulSysTickCounts, ulTickCount, ulReturn;
const unsigned long ulSysTickReloadValue = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
volatile unsigned long * const pulCurrentSysTickCount = ( ( volatile unsigned long *) 0xe000e018 );
volatile unsigned long * const pulInterruptCTRLState = ( ( volatile unsigned long *) 0xe000ed04 );
const unsigned long ulSysTickPendingBit = 0x04000000UL;

	/* NOTE: There are potentially race conditions here.  However, it is used
	anyway to keep the examples simple, and to avoid reliance on a separate
	timer peripheral. */


	/* The SysTick is a down counter.  How many clocks have passed since it was
	last reloaded? */
	ulSysTickCounts = ulSysTickReloadValue - *pulCurrentSysTickCount;

	/* How many times has it overflowed? */
	ulTickCount = xTaskGetTickCountFromISR();

	/* This is called from the context switch, so will be called from a
	critical section.  xTaskGetTickCountFromISR() contains its own critical
	section, and the ISR safe critical sections are not designed to nest,
	so reset the critical section. */
	portSET_INTERRUPT_MASK_FROM_ISR();

	/* Is there a SysTick interrupt pending? */
	if( ( *pulInterruptCTRLState & ulSysTickPendingBit ) != 0UL )
	{
		/* There is a SysTick interrupt pending, so the SysTick has overflowed
		but the tick count not yet incremented. */
		ulTickCount++;

		/* Read the SysTick again, as the overflow might have occurred since
		it was read last. */
		ulSysTickCounts = ulSysTickReloadValue - *pulCurrentSysTickCount;
	}

	/* Convert the tick count into tenths of a millisecond.  THIS ASSUMES
	configTICK_RATE_HZ is 1000! */
	ulReturn = ( ulTickCount * 10UL ) ;

	/* Add on the number of tenths of a millisecond that have passed since the
	tick count last got updated. */
	ulReturn += ( ulSysTickCounts / ulClocksPer10thOfAMilliSecond );

	return ulReturn;
}

EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup )
{
UBaseType_t uxSavedInterruptStatus;
EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;
EventBits_t uxReturn;

	taskENTER_CRITICAL();
	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		uxReturn = pxEventBits->uxEventBits;
	}
//	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
	taskEXIT_CRITICAL();

	return uxReturn;
}

/**************************************************************************//**
 * @brief		Schreibt von ISR aus ein Byte in FIFO
 *
 * @param[in, out]	pFIFO								FIFO
 * @param[in]	b										Datum
 *
 * @return      true - Alles OK, false - kein Platz im FIFO
 */
bool	FIFO_PutFromISR(pT_ByteFIFO pFIFO, uint8_t b)
{
uint32_t Next = (((T_ByteFIFO*)pFIFO)->Head + 1) % ((T_ByteFIFO*)pFIFO)->Size;

	if (Next == ((T_ByteFIFO*)pFIFO)->Tail)							// Voll ?
		return false;									// Ende!

uint32_t SavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();

		((T_ByteFIFO*)pFIFO)->Buffer[((T_ByteFIFO*)pFIFO)->Head] = b;					// Byte rein
		((T_ByteFIFO*)pFIFO)->Head = Next;

		portCLEAR_INTERRUPT_MASK_FROM_ISR(SavedInterruptStatus);

	return true;
}

void xPortSysTickHandler( void )
{
unsigned long ulDummy;

	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		vTaskIncrementTick();
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );

	/* If using preemption, also force a context switch. */
	#if configUSE_PREEMPTION == 1
		*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
		portINTERRUPT_CORE( (~portTICKEXE_CORENUM) & 0x1 );
	#endif
}

void vParTestSetLEDFromISR( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
    unsigned portBASE_TYPE uxInterruptFlags;

    uxInterruptFlags = portSET_INTERRUPT_MASK_FROM_ISR();
    {
        if( uxLED < partstMAX_LEDS ) {
            if( xValue == pdTRUE ) {
                FM3_GPIO->PDOR3 &= ~( 1UL << ( uxLED + partstLED_0_OFFSET ) );
            } else {
                FM3_GPIO->PDOR3 |= ( 1UL << ( uxLED + partstLED_0_OFFSET ) );
            }
        }
    }
    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxInterruptFlags );
}

/**************************************************************************//**
 * @brief		Liest von ISR aus ein Byte aus FIFO
 *
 * @param[in, out]	pFIFO								FIFO
 * @param[out]	pb										Datum
 *
 * @return      true - Alles OK in pB steht Datum, false - FIFO ist leer
 */
bool	FIFO_GetFromISR(pT_ByteFIFO pFIFO, uint8_t *pb)
{
	if (((T_ByteFIFO*)pFIFO)->Head == ((T_ByteFIFO*)pFIFO)->Tail)						// Leer
		return false;									// Ende!

uint32_t Next = (((T_ByteFIFO*)pFIFO)->Tail + 1) % ((T_ByteFIFO*)pFIFO)->Size;

uint32_t SavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();

		*pb = ((T_ByteFIFO*)pFIFO)->Buffer[((T_ByteFIFO*)pFIFO)->Tail];					// Byte raus
		((T_ByteFIFO*)pFIFO)->Tail = Next;

		portCLEAR_INTERRUPT_MASK_FROM_ISR(SavedInterruptStatus);

	return true;
}

void TIM6_IRQHandler(void)//1ms
{
	static uint16_t count_1s = 0;

	unsigned portBASE_TYPE uxSavedInterruptStatus;
	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
//	
//	count++;
//	if(count >= 10) 
//	{
//		count = 0;
//		uip_timer++;		//uip计时器增加1
//	}
//	if(TIM6->SR & 0X0001)	//溢出中断
#if ARM_MINI
	scan_led();
#endif	
	if(TIM_GetFlagStatus(TIM6, TIM_IT_Update) == SET)
	{
		uip_timer++;		//uip计时器增加1
	}
	
	
	miliseclast = miliseclast + SWTIMER_INTERVAL;  // 1ms

	if(count_1s < 1000 / SWTIMER_INTERVAL)
	{
		count_1s++;
	}
	else	
	{
		run_time++;
#if 0
	  timestart++;
#endif
		count_1s = 0;
	}
	SilenceTime = SilenceTime + SWTIMER_INTERVAL;
	if(SilenceTime > 10000)	
	{
		SilenceTime = 0;
	}	
//	TIM6->SR &= ~(1 << 0);	//清除中断标志位 
	TIM_ClearFlag(TIM6, TIM_IT_Update);		
	
	portCLEAR_INTERRUPT_MASK_FROM_ISR(uxSavedInterruptStatus);
}

void xPortSysTickHandler( void )
{
    nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_TICK);
#if configUSE_TICKLESS_IDLE == 1
    nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
#endif
    uint32_t isrstate = portSET_INTERRUPT_MASK_FROM_ISR();
    /* Increment the RTOS tick. */
    if ( xTaskIncrementTick() != pdFALSE )
    {
        /* A context switch is required.  Context switching is performed in
        the PendSV interrupt.  Pend the PendSV interrupt. */
        SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;
        __SEV();
    }
    portCLEAR_INTERRUPT_MASK_FROM_ISR( isrstate );
}

void xPortSysTickHandler( void )
{
    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
    executes all interrupts must be unmasked.  There is therefore no need to
    save and then restore the interrupt mask value as its value is already
    known. */
    ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
    {
        /* Increment the RTOS tick. */
        if( xTaskIncrementTick() != pdFALSE ) {
            /* A context switch is required.  Context switching is performed in
            the PendSV interrupt.  Pend the PendSV interrupt. */
            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
        }
    }
    portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
}

void interrupt VectorNumber_Vrtc vPortTickISR( void )
{
uint32_t ulSavedInterruptMask;

	/* Clear the interrupt. */
	RTCSC |= RTCSC_RTIF_MASK;

	/* Increment the RTOS tick. */
	ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		if( xTaskIncrementTick() != pdFALSE )
		{
			taskYIELD();
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
}

BaseType_t vNetworkBufferReleaseFromISR( xNetworkBufferDescriptor_t * const pxNetworkBuffer )
{
    UBaseType_t uxSavedInterruptStatus;
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;

    /* Ensure the buffer is returned to the list of free buffers before the
    counting semaphore is 'given' to say a buffer is available. */
    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
    {
        vListInsertEnd( &xFreeBuffersList, &( pxNetworkBuffer->xBufferListItem ) );
    }
    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

    xSemaphoreGiveFromISR( xNetworkBufferSemaphore, &xHigherPriorityTaskWoken );
    iptraceNETWORK_BUFFER_RELEASED( pxNetworkBuffer );

    return xHigherPriorityTaskWoken;
}

void xPortSysTickHandler( void )
{
unsigned long ulDummy;

	/* If using preemption, also force a context switch. */
	#if configUSE_PREEMPTION == 1
		*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
	#endif

	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		//GPIOB->BSRRH = GPIO_BSRR_BS_0;
		powerStateCheck();
		//GPIOB->BSRRL = GPIO_BSRR_BS_0;
		vTaskIncrementTick();
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
}

/// Return an allocated memory block back to a specific memory pool
/// \param[in]     pool_id       memory pool ID obtain referenced with \ref osPoolCreate.
/// \param[in]     block         address of the allocated memory block that is returned to the memory pool.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osPoolFree shall be consistent in every CMSIS-RTOS.
osStatus osPoolFree (osPoolId pool_id, void *block)
{
    int dummy;
    uint32_t index;

    if (pool_id == NULL) {
        return osErrorParameter;
    }

    if (block == NULL) {
        return osErrorParameter;
    }

    if (block < pool_id->pool) {
        return osErrorParameter;
    }

    index = (uint32_t)block - (uint32_t)(pool_id->pool);
    if (index % pool_id->item_sz) {
        return osErrorParameter;
    }
    index = index / pool_id->item_sz;
    if (index >= pool_id->pool_sz) {
        return osErrorParameter;
    }

    if (inHandlerMode()) {
        dummy = portSET_INTERRUPT_MASK_FROM_ISR();
    }
    else {
        vPortEnterCritical();
    }

    pool_id->markers[index] = 0;

    if (inHandlerMode()) {
        portCLEAR_INTERRUPT_MASK_FROM_ISR(dummy);
    }
    else {
        vPortExitCritical();
    }

    return osOK;
}

/**
 * @brief	Tick interrupt handler routine
 * @return	Nothing
 * @note	This function handles the tick interrupts that are generated by RITIMER.
 */
void xPortSysTickHandler(void)
{
	unsigned long ulDummy;

	/* TODO: check if WWDT interrupt and redirect */
	Chip_RIT_ClearInt(LPC_RITIMER);
	Chip_RIT_SetCOMPVAL(LPC_RITIMER, Chip_RIT_GetCounter(LPC_RITIMER) + reload_val);/* Reload value */

#if configUSE_PREEMPTION == 1
	/* If using preemption, also force a context switch. */
	*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
#endif

	ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
	{
		vTaskIncrementTick();
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR(ulDummy);
}