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C++ pnp_set_logical_device函数代码示例

原作者: [db:作者] 来自: [db:来源] 收藏 邀请

本文整理汇总了C++中pnp_set_logical_device函数的典型用法代码示例。如果您正苦于以下问题：C++ pnp_set_logical_device函数的具体用法？C++ pnp_set_logical_device怎么用？C++ pnp_set_logical_device使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。



在下文中一共展示了pnp_set_logical_device函数的20个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于我们的系统推荐出更棒的C++代码示例。

示例1: mainboard_config_superio

void mainboard_config_superio(void)
{
	const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0);
	const pnp_devfn_t SERIAL_DEV = PNP_DEV(0x2e, NCT6776_SP1);
	const pnp_devfn_t ACPI_DEV = PNP_DEV(0x2e, NCT6776_ACPI);
	const pnp_devfn_t IR_DEV = PNP_DEV(0x2e, NCT6776_SP2);

	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

	nuvoton_pnp_enter_conf_state(GLOBAL_PSEUDO_DEV);

	/* Select HWM/LED functions instead of floppy functions. */
	pnp_write_config(GLOBAL_PSEUDO_DEV, 0x1c, 0x03);
	pnp_write_config(GLOBAL_PSEUDO_DEV, 0x24, 0x24);

	/* Power RAM in S3 and let the PCH handle power failure actions. */
	pnp_set_logical_device(ACPI_DEV);
	pnp_write_config(ACPI_DEV, 0xe4, 0x70);

	/*
	 * Don't know what's needed here, just set the same as the vendor
	 * firmware.
	 */
	pnp_set_logical_device(IR_DEV);
	pnp_write_config(IR_DEV, 0xf1, 0x5c);

	nuvoton_pnp_exit_conf_state(GLOBAL_PSEUDO_DEV);
}
开发者ID:canistation，项目名称:coreboot，代码行数:28，代码来源:romstage.c


示例2: sch4037_early_init

void sch4037_early_init(unsigned port)
{
	pnp_devfn_t dev;

	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
	pnp_enter_conf_state(dev);

	/* Auto power management */
	pnp_write_config(dev, 0x22, 0x38); /* BIT3+BIT4+BIT5 */
	pnp_write_config(dev, 0x23, 0);

	/* Enable SMSC UART 0 */
	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, 0);

	pnp_set_iobase(dev, PNP_IDX_IO0, CONFIG_TTYS0_BASE);
	pnp_set_irq(dev, PNP_IDX_IRQ0, 0x4);

	/* Enabled High speed, disabled MIDI support. */
	pnp_write_config(dev, 0xF0, 0x02);
	pnp_set_enable(dev, 1);

	/* Enable keyboard */
	dev = PNP_DEV(port, SCH4037_KBC);
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, 0);
	pnp_set_irq(dev, 0x70, 1);   /* IRQ 1 */
	pnp_set_irq(dev, 0x72, 12);   /* IRQ 12 */
	pnp_set_enable(dev, 1);

	pnp_exit_conf_state(dev);
}
开发者ID:canistation，项目名称:coreboot，代码行数:33，代码来源:sch4037_early_init.c


示例3: superio_init

static void superio_init(void)
{
	/* Set base address of power management unit */
	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 8);
	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
	pnp_set_iobase0(SUPERIO_CONFIG_PORT, PM_BASE);
	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);

	/* Use on-chip clock multiplier */
	outb(0x03, PM_BASE);
	outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1);

	/* Wait for the clock to stabilise */
	while (!(inb(PM_BASE + 1) & 0x80)) ;

	/* Enable the serial ports. */
	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 6);	/* COM1 */
	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
	pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
	pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);

	/* Set LDN 5 UART Mode */
	outb(0x21, SUPERIO_CONFIG_PORT);
	outb(inb(SUPERIO_CONFIG_PORT + 1) | (1 << 3), SUPERIO_CONFIG_PORT + 1);
	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 5);	/* COM2 */
	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
	pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x2f8);
	pnp_set_irq0(SUPERIO_CONFIG_PORT, 3);
	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);
}
开发者ID:B-Rich，项目名称:serialice，代码行数:31，代码来源:televideo_tc7010.c


示例4: f81865f_pnp_enable

static void f81865f_pnp_enable(device_t dev)
{
	pnp_enter_conf_state(dev);
	pnp_set_logical_device(dev);
	(dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0);
	pnp_exit_conf_state(dev);
}
开发者ID:bolyboly，项目名称:coreboot，代码行数:7，代码来源:superio.c


示例5: pc87366_enable_serial

void pc87366_enable_serial(pnp_devfn_t dev, u16 iobase)
{
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, 0);
	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
	pnp_set_enable(dev, 1);
}
开发者ID:tidatida，项目名称:coreboot，代码行数:7，代码来源:early_serial.c


示例6: pc87309_enable_serial

static void pc87309_enable_serial(device_t dev, u16 iobase)
{
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, 0);
	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
	pnp_set_enable(dev, 1);
}
开发者ID:hustcalm，项目名称:coreboot-hacking，代码行数:7，代码来源:early_serial.c


示例7: it8712f_pnp_enable

static void it8712f_pnp_enable(device_t dev)
{
	pnp_enter_ext_func_mode(dev);
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, !!dev->enabled);
	pnp_exit_ext_func_mode(dev);
}
开发者ID:bolyboly，项目名称:coreboot，代码行数:7，代码来源:superio.c


示例8: lpc47m10x_pnp_enable

static void lpc47m10x_pnp_enable(device_t dev)
{
    pnp_enter_conf_state(dev);
    pnp_set_logical_device(dev);
    pnp_set_enable(dev, !!dev->enabled);
    pnp_exit_conf_state(dev);
}
开发者ID:michaelforney，项目名称:coreboot，代码行数:7，代码来源:superio.c


示例9: it8716f_enable_dev

void it8716f_enable_dev(device_t dev, u16 iobase)
{
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, 0);
	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
	pnp_set_enable(dev, 1);
}
开发者ID:bolyboly，项目名称:coreboot，代码行数:7，代码来源:early_init.c


示例10: smsc_pnp_enable

/**
 * If so configured, enable the specified device, otherwise
 * explicitly disable it.
 *
 * @param dev The device to use.
 */
static void smsc_pnp_enable(device_t dev)
{
	smsc_pnp_enter_conf_state(dev);
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, !!dev->enabled);
	smsc_pnp_exit_conf_state(dev);
}
开发者ID:andy737，项目名称:firebrickRemote，代码行数:13，代码来源:superio.c


示例11: init

static void init(struct device *dev)
{
	u8 reg8;

	if (!dev->enabled)
		return;

	switch(dev->path.pnp.device) {
	case PC97307_KBCK:
		pnp_set_logical_device(dev);
		pnp_set_enable(dev, 0);		   /* Disable keyboard */
		pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */
		pnp_set_enable(dev, 1);		   /* Enable keyboard. */
		pc_keyboard_init();
		break;
	case PC97307_FDC:
		/* Set up floppy in PS/2 mode. */
		outb(0x09, SIO_CONFIG_RA);
		reg8 = inb(SIO_CONFIG_RD);
		reg8 = (reg8 & 0x3F) | 0x40;
		outb(reg8, SIO_CONFIG_RD);
		outb(reg8, SIO_CONFIG_RD); /* Have to write twice to change! */
		break;
	default:
		break;
	}
}
开发者ID:kmalkki，项目名称:coreboot，代码行数:27，代码来源:superio.c


示例12: pilot_enable_serial

/* Serial config is a fairly standard procedure. */
static void pilot_enable_serial(device_t dev, unsigned iobase)
{
	pnp_enter_ext_func_mode(dev);
	pnp_set_logical_device(dev);
	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
	pnp_set_enable(dev, 1);
	pnp_exit_ext_func_mode(dev);
}
开发者ID:kelsieflynn，项目名称:coreboot-1，代码行数:9，代码来源:pilot_early_serial.c


示例13: pilot_disable_serial

static void pilot_disable_serial(device_t dev)
{
	pnp_enter_ext_func_mode(dev);
	pnp_set_logical_device(dev);
	pnp_set_iobase(dev, PNP_IDX_IO0, 0x00);
	pnp_set_enable(dev, 0);
	pnp_exit_ext_func_mode(dev);
}
开发者ID:kelsieflynn，项目名称:coreboot-1，代码行数:8，代码来源:pilot_early_serial.c


示例14: pc8374_enable_dev

static void pc8374_enable_dev(pnp_devfn_t dev, u16 iobase)
{
    pnp_set_logical_device(dev);
    pnp_set_enable(dev, 0);
    if (iobase)
        pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
    pnp_set_enable(dev, 1);
}
开发者ID:RafaelRMachado，项目名称:Coreboot，代码行数:8，代码来源:early_init.c


示例15: superio_init

static void superio_init(void)
{
	pnp_enter_ext_func_mode_ite(SUPERIO_CONFIG_PORT);

	/* Disable the watchdog. */
	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 7);
	pnp_write_register(SUPERIO_CONFIG_PORT, 0x72, 0x00);

	/* Enable the serial port. */
	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 1); /* COM1 */
	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
	pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
	pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);

	pnp_exit_ext_func_mode_ite(SUPERIO_CONFIG_PORT);
}
开发者ID:coreboot，项目名称:serialice，代码行数:17，代码来源:asus_m4a77td-pro.c


示例16: it8661f_enable_serial

void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase)
{
	pnp_enter_ext_func_mode(dev);
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, 0);
	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
	pnp_set_enable(dev, 1);
	pnp_exit_ext_func_mode(dev);
}
开发者ID:kmalkki，项目名称:coreboot，代码行数:9，代码来源:early_serial.c


示例17: lpc47b272_enable_serial

/*
 * Function:    	lpc47b272_enable_serial
 * Parameters:  	dev - high 8 bits = Super I/O port,
 *			      low 8 bits = logical device number (per lpc47b272.h)
 *			iobase - processor I/O port address to assign to this serial device
 * Return Value:	bool
 * Description: 	Configure the base I/O port of the specified serial device
 *			and enable the serial device.
 */
static void lpc47b272_enable_serial(device_t dev, unsigned iobase)
{
	pnp_enter_conf_state(dev);
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, 0);
	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
	pnp_set_enable(dev, 1);
	pnp_exit_conf_state(dev);
}
开发者ID:kelsieflynn，项目名称:coreboot-1，代码行数:18，代码来源:lpc47b272_early_serial.c


示例18: w83627thg_enable_serial

static inline void w83627thg_enable_serial(device_t dev, unsigned int iobase)
{
	pnp_enter_ext_func_mode(dev);
	pnp_set_logical_device(dev);
	pnp_set_enable(dev, 0);
	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
	pnp_set_enable(dev, 1);
	pnp_exit_ext_func_mode(dev);
}
开发者ID:kelsieflynn，项目名称:coreboot-1，代码行数:9，代码来源:w83627thg_early_serial.c


示例19: sio_init

static void sio_init(void)
{
	u8 reg;

	pnp_enter_ext_func_mode(SERIAL_DEV);
	/* We have 24MHz input. */
	reg = pnp_read_config(SERIAL_DEV, 0x24);
	pnp_write_config(SERIAL_DEV, 0x24, (reg & ~0x40));
	/* We have GPIO for KB/MS pin. */
	reg = pnp_read_config(SERIAL_DEV, 0x2a);
	pnp_write_config(SERIAL_DEV, 0x2a, (reg | 1));
	/* We have all RESTOUT and even some reserved bits, too. */
	reg = pnp_read_config(SERIAL_DEV, 0x2c);
	pnp_write_config(SERIAL_DEV, 0x2c, (reg | 0xf0));
	pnp_exit_ext_func_mode(SERIAL_DEV);

	pnp_enter_ext_func_mode(ACPI_DEV);
	pnp_set_logical_device(ACPI_DEV);
	/*
	 * Set the delay rising time from PWROK_LP to PWROK_ST to
	 * 300 - 600ms, and 0 to vice versa.
	 */
	reg = pnp_read_config(ACPI_DEV, 0xe6);
	pnp_write_config(ACPI_DEV, 0xe6, (reg & 0xf0));
	/* 1 Use external suspend clock source 32.768KHz. Undocumented?? */
	reg = pnp_read_config(ACPI_DEV, 0xe4);
	pnp_write_config(ACPI_DEV, 0xe4, (reg | 0x10));
	pnp_exit_ext_func_mode(ACPI_DEV);

	pnp_enter_ext_func_mode(GPIO_DEV);
	pnp_set_logical_device(GPIO_DEV);
	/* Set memory voltage to 2.75V, vcore offset + 100mV, 1.5V chipset voltage. */
	pnp_write_config(GPIO_DEV, 0x30, 0x09);	/* Enable GPIO 2 & GPIO 5. */
	pnp_write_config(GPIO_DEV, 0xe2, 0x00);	/* No inversion */
	pnp_write_config(GPIO_DEV, 0xe5, 0x00);	/* No inversion */
	pnp_write_config(GPIO_DEV, 0xe3, 0x03);	/* 0000 0011, 0=output 1=input */
	pnp_write_config(GPIO_DEV, 0xe0, 0xde);	/* 1101 1110, 0=output 1=input */
	pnp_write_config(GPIO_DEV, 0xe1, 0x01);	/* Set output val. */
	pnp_write_config(GPIO_DEV, 0xe4, 0xb4);	/* Set output val (1011 0100). */
	pnp_exit_ext_func_mode(GPIO_DEV);
}
开发者ID:DarkDefender，项目名称:coreboot，代码行数:41，代码来源:romstage.c


示例20: superio_init

static void superio_init(void)
{
	pnp_enter_ext_func_mode_alt(SUPERIO_CONFIG_PORT);

	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 4); /* COM1 */
	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
	pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
	pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);

#if 0
        /* Must route GPIO to UART2 before enabling this */
	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 5); /* COM2 */
	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
	pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x2f8);
	pnp_set_irq0(SUPERIO_CONFIG_PORT, 3);
	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);
#endif

	pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT);
}
开发者ID:coreboot，项目名称:serialice，代码行数:21，代码来源:aopen_dxpl-plus.c



注：本文中的pnp_set_logical_device函数示例由纯净天空整理自Github/MSDocs等源码及文档管理平台，相关代码片段筛选自各路编程大神贡献的开源项目，源码版权归原作者所有，传播和使用请参考对应项目的License；未经允许，请勿转载。

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