/* Set correct numa_node information for AMD NB functions */
static void __init quirk_amd_nb_node(struct pci_dev *dev)
{
	struct pci_dev *nb_ht;
	unsigned int devfn;
	u32 val;

	devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
	nb_ht = pci_get_slot(dev->bus, devfn);
	if (!nb_ht)
		return;

	pci_read_config_dword(nb_ht, 0x60, &val);
	set_dev_node(&dev->dev, val & 7);
	pci_dev_put(nb_ht);
}

static int
ofw_pci_route_interrupt(device_t bus, device_t dev, int pin)
{
	struct ofw_pci_softc *sc;
	struct ofw_pci_register reg;
	uint32_t pintr, mintr[2];
	int intrcells;
	phandle_t iparent;

	sc = device_get_softc(bus);
	pintr = pin;

	/* Fabricate imap information in case this isn't an OFW device */
	bzero(&reg, sizeof(reg));
	reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
	    (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
	    (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);

	intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev),
	    &sc->sc_pci_iinfo, &reg, sizeof(reg), &pintr, sizeof(pintr),
	    mintr, sizeof(mintr), &iparent);
	if (intrcells) {
		pintr = ofw_bus_map_intr(dev, iparent, mintr[0]);
		if (intrcells == 2)
			ofw_bus_config_intr(dev, pintr, mintr[1]);
		return (pintr);
	}

	/* Maybe it's a real interrupt, not an intpin */
	if (pin > 4)
		return (pin);

	device_printf(bus, "could not route pin %d for device %d.%d\n",
	    pin, pci_get_slot(dev), pci_get_function(dev));
	return (PCI_INVALID_IRQ);
}

/*
 * Set the SYSTEM_IDLE_TIMEOUT to 80 ns on nForce2 systems to work
 * around a hang that is triggered when the CPU generates a very fast
 * CONNECT/HALT cycle sequence.  Specifically, the hang can result in
 * the lapic timer being stopped.
 *
 * This requires changing the value for config register at offset 0x6c
 * for the Host-PCI bridge at bus/dev/function 0/0/0:
 *
 * Chip	Current Value	New Value
 * ----	----------	----------
 * C17	0x1F0FFF01	0x1F01FF01
 * C18D	0x9F0FFF01	0x9F01FF01
 *
 * We do this by always clearing the bits in 0x000e0000.
 *
 * See also: http://lkml.org/lkml/2004/5/3/157
 */
static void
fixc1_nforce2(device_t dev)
{
	uint32_t val;

	if (pci_get_bus(dev) == 0 && pci_get_slot(dev) == 0 &&
	    pci_get_function(dev) == 0) {
		val = pci_read_config(dev, 0x6c, 4);
		if (val & 0x000e0000) {
			printf("Correcting nForce2 C1 CPU disconnect hangs\n");
			val &= ~0x000e0000;
			pci_write_config(dev, 0x6c, val, 4);
		}
	}
}

static int
t4iov_attach(device_t dev)
{
	struct t4iov_softc *sc;

	sc = device_get_softc(dev);
	sc->sc_dev = dev;

	sc->sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev),
	    pci_get_slot(dev), 4);
	if (sc->sc_main == NULL)
		return (ENXIO);
	if (T4_IS_MAIN_READY(sc->sc_main) == 0)
		return (t4iov_attach_child(dev));
	return (0);
}

static struct pptdev *
ppt_find(int bus, int slot, int func)
{
	device_t dev;
	int i, b, s, f;

	for (i = 0; i < num_pptdevs; i++) {
		dev = pptdevs[i].dev;
		b = pci_get_bus(dev);
		s = pci_get_slot(dev);
		f = pci_get_function(dev);
		if (bus == b && slot == s && func == f)
			return (&pptdevs[i]);
	}
	return (NULL);
}

static int __init
miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
        static char irq_tab[18][5] __initdata = {
		/*                                 */
		{16+ 8, 16+ 8, 16+ 8, 16+ 8, 16+ 8},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{16+12, 16+12, 16+13, 16+14, 16+15},  /*                    */
		{16+16, 16+16, 16+17, 16+18, 16+19},  /*                    */
		/*                                                         */
		{16+11, 16+11, 16+11, 16+11, 16+11},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
		{16+20, 16+20, 16+21, 16+22, 16+23},  /*                    */
		{16+24, 16+24, 16+25, 16+26, 16+27},  /*                    */
		{16+28, 16+28, 16+29, 16+30, 16+31},  /*                    */
		/*                                                        */
		{   -1,    -1,    -1,    -1,    -1},  /*                    */
        };
	const long min_idsel = 3, max_idsel = 20, irqs_per_slot = 5;
	
	/*                                                                
                                                                      */

	if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {
		u8 irq=0;
		struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);
		if(pdev == NULL || pci_read_config_byte(pdev, 0x40,&irq) != PCIBIOS_SUCCESSFUL) {
			pci_dev_put(pdev);
			return -1;
		}
		else	{
			pci_dev_put(pdev);
			return irq;
		}
	}

	return COMMON_TABLE_LOOKUP;
}

/* Check for NSC87560. We have to look at the bridge (fn1) to
 * identify the USB (fn2). This quirk might apply to more or
 * even all NSC stuff.
 */
static int ohci_quirk_ns(struct usb_hcd *hcd)
{
	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
	struct pci_dev	*b;

	b  = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
	if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
	    && b->vendor == PCI_VENDOR_ID_NS) {
		struct ohci_hcd	*ohci = hcd_to_ohci (hcd);

		ohci->flags |= OHCI_QUIRK_SUPERIO;
		ohci_dbg (ohci, "Using NSC SuperIO setup\n");
	}
	pci_dev_put(b);

	return 0;
}

static void
ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
{
	struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
	unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);

	master_pdev = pci_get_slot(pdev->bus, master_devfn);
	if (master_pdev) {
		struct ahd_softc *master = pci_get_drvdata(master_pdev);
		if (master) {
			ahd->flags &= ~AHD_BIOS_ENABLED;
			ahd->flags |= master->flags & AHD_BIOS_ENABLED;
		} else
			printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
		pci_dev_put(master_pdev);
	}
}

static int __init
miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
        static char irq_tab[18][5] __initdata = {
		/*INT    INTA   INTB   INTC   INTD */
		{16+ 8, 16+ 8, 16+ 8, 16+ 8, 16+ 8},  /* IdSel 14,  DC21142 */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 15,  EIDE    */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 16,  none    */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 17,  none    */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 18,  PCI-ISA */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 19,  PCI-PCI */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 20,  none    */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 21,  none    */
		{16+12, 16+12, 16+13, 16+14, 16+15},  /* IdSel 22,  slot 4  */
		{16+16, 16+16, 16+17, 16+18, 16+19},  /* IdSel 23,  slot 5  */
		/* the next 7 are actually on PCI bus 1, across the bridge */
		{16+11, 16+11, 16+11, 16+11, 16+11},  /* IdSel 24,  QLISP/GL*/
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 25,  none    */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 26,  none    */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 27,  none    */
		{16+20, 16+20, 16+21, 16+22, 16+23},  /* IdSel 28,  slot 1  */
		{16+24, 16+24, 16+25, 16+26, 16+27},  /* IdSel 29,  slot 2  */
		{16+28, 16+28, 16+29, 16+30, 16+31},  /* IdSel 30,  slot 3  */
		/* This bridge is on the main bus of the later orig MIATA */
		{   -1,    -1,    -1,    -1,    -1},  /* IdSel 31,  PCI-PCI */
        };
	const long min_idsel = 3, max_idsel = 20, irqs_per_slot = 5;
	
	/* the USB function of the 82c693 has it's interrupt connected to 
           the 2nd 8259 controller. So we have to check for it first. */

	if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {
		u8 irq=0;
		struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);
		if(pdev == NULL || pci_read_config_byte(pdev, 0x40,&irq) != PCIBIOS_SUCCESSFUL) {
			pci_dev_put(pdev);
			return -1;
		}
		else	{
			pci_dev_put(pdev);
			return irq;
		}
	}

	return COMMON_TABLE_LOOKUP;
}

int
ppt_unassign_all(struct vm *vm)
{
	int i, bus, slot, func;
	device_t dev;

	for (i = 0; i < num_pptdevs; i++) {
		if (pptdevs[i].vm == vm) {
			dev = pptdevs[i].dev;
			bus = pci_get_bus(dev);
			slot = pci_get_slot(dev);
			func = pci_get_function(dev);
			vm_unassign_pptdev(vm, bus, slot, func);
		}
	}

	return (0);
}

static void
acpi_pci_update_device(ACPI_HANDLE handle, device_t pci_child)
{
    ACPI_STATUS status;
    device_t child;

    /*
     * Lookup and remove the unused device that acpi0 creates when it walks
     * the namespace creating devices.
     */
    child = acpi_get_device(handle);
    if (child != NULL) {
        if (device_is_alive(child)) {
            /*
             * The TabletPC TC1000 has a second PCI-ISA bridge
             * that has a _HID for an acpi_sysresource device.
             * In that case, leave ACPI-CA's device data pointing
             * at the ACPI-enumerated device.
             */
            device_printf(child,
                          "Conflicts with PCI device %d:%d:%d\n",
                          pci_get_bus(pci_child), pci_get_slot(pci_child),
                          pci_get_function(pci_child));
            return;
        }
        KASSERT(device_get_parent(child) ==
                devclass_get_device(devclass_find("acpi"), 0),
                ("%s: child (%s)'s parent is not acpi0", __func__,
                 acpi_name(handle)));
        device_delete_child(device_get_parent(child), child);
    }

    /*
     * Update ACPI-CA to use the PCI enumerated device_t for this handle.
     */
    status = AcpiDetachData(handle, acpi_fake_objhandler);
    if (ACPI_FAILURE(status))
        kprintf("WARNING: Unable to detach object data from %s - %s\n",
                acpi_name(handle), AcpiFormatException(status));
    status = AcpiAttachData(handle, acpi_fake_objhandler, pci_child);
    if (ACPI_FAILURE(status))
        kprintf("WARNING: Unable to attach object data to %s - %s\n",
                acpi_name(handle), AcpiFormatException(status));
}

VOID *RTMPFindHostPCIDev(
    IN	VOID					*pPciDevSrc)
{
	struct pci_dev *pci_dev = (struct pci_dev *)pPciDevSrc;
	struct pci_dev *parent_pci_dev;
    USHORT  reg16;
    UCHAR   reg8;
	UINT	DevFn;
    PPCI_DEV    pPci_dev;
/*	POS_COOKIE 	pObj; */

/*	pObj = (POS_COOKIE) pAd->OS_Cookie; */

/*	if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE)) */
/*		return; */
    
    DBGPRINT(RT_DEBUG_TRACE, ("%s.===>\n", __FUNCTION__));

    parent_pci_dev = NULL;
    if (pci_dev->bus->parent)
    {
        for (DevFn = 0; DevFn < 255; DevFn++)
        {
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
            pPci_dev = pci_get_slot(pci_dev->bus->parent, DevFn);
#else
            pPci_dev = pci_find_slot(pci_dev->bus->parent->number, DevFn);
#endif
            if (pPci_dev)
            {                
                pci_read_config_word(pPci_dev, PCI_CLASS_DEVICE, &reg16);
                reg16 = le2cpu16(reg16);
                pci_read_config_byte(pPci_dev, PCI_CB_CARD_BUS, &reg8);
                if ((reg16 == PCI_CLASS_BRIDGE_PCI) && 
                    (reg8 == pci_dev->bus->number))
                {
                    return pPci_dev;
                }
            }
        }
    }
	return NULL;
}

extern int
machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
{
	int bus;
	int device;
	int func;
	uint32_t busno;
	struct i80321_pci_softc *sc = device_get_softc(pcib);
	bus = pci_get_bus(dev);
	device = pci_get_slot(dev);
	func = pci_get_function(dev);
	busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
	busno = PCIXSR_BUSNO(busno);
	if (busno == 0xff)
		busno = 0;
	if (bus != busno)
		goto no_mapping;
	switch (device) {
		/* EP80219 PCI */
	case 1: /* Ethernet i82555 10/100 */
		printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(0));
		return (ICU_INT_XINT(0));
	case 2: /* UART */
		printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(1));
		return (ICU_INT_XINT(1));
	case 3:
		/*
		 * The S-ATA chips are behind the bridge, and all of
		 * the S-ATA interrupts are wired together.
		 */
		printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(2));
		return (ICU_INT_XINT(2));
	case 4: /* MINI-PIC_INT */
		printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(3));
		return( ICU_INT_XINT(3));
	default:
no_mapping:
		printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
		
	}
	return (0);

}

static void
ahc_linux_pci_inherit_flags(struct ahc_softc *ahc)
{
	struct pci_dev *pdev = ahc->dev_softc, *master_pdev;
	unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);

	master_pdev = pci_get_slot(pdev->bus, master_devfn);
	if (master_pdev) {
		struct ahc_softc *master = pci_get_drvdata(master_pdev);
		if (master) {
			ahc->flags &= ~AHC_BIOS_ENABLED; 
			ahc->flags |= master->flags & AHC_BIOS_ENABLED;

			ahc->flags &= ~AHC_PRIMARY_CHANNEL; 
			ahc->flags |= master->flags & AHC_PRIMARY_CHANNEL;
		} else
;
		pci_dev_put(master_pdev);
	} 
}

static int
ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev, int intpin)
{
	struct ofw_pcib_softc *sc;
	struct ofw_bus_iinfo *ii;
	struct ofw_pci_register reg;
	cell_t pintr, mintr;
	phandle_t iparent;
	uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];

	sc = device_get_softc(bridge);
	ii = &sc->ops_iinfo;
	if (ii->opi_imapsz > 0) {
		pintr = intpin;

		/* Fabricate imap information if this isn't an OFW device */
		bzero(&reg, sizeof(reg));
		reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
		    (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
		    (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);

		if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), ii, &reg,
		    sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr),
		    &iparent, maskbuf)) {
			/*
			 * If we've found a mapping, return it and don't map
			 * it again on higher levels - that causes problems
			 * in some cases, and never seems to be required.
			 */
			return (ofw_bus_map_intr(dev, iparent, mintr));
		}
	} else if (intpin >= 1 && intpin <= 4) {
		/*
		 * When an interrupt map is missing, we need to do the
		 * standard PCI swizzle and continue mapping at the parent.
		 */
		return (pcib_route_interrupt(bridge, dev, intpin));
	}
	return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent(
	    bridge)), bridge, intpin));
}

static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev)
{
	struct pci_dev *dev2;

	dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 1,
						PCI_FUNC(dev->devfn)));

	if (dev2 &&
	    dev2->vendor == dev->vendor &&
	    dev2->device == dev->device) {

		if (dev2->irq != dev->irq) {
			dev2->irq = dev->irq;
			printk(KERN_INFO DRV_NAME " %s: PCI config space "
				"interrupt fixed\n", pci_name(dev));
		}

		return dev2;
	}

	return NULL;
}

/* Set correct numa_node information for AMD NB functions */
static void quirk_amd_nb_node(struct pci_dev *dev)
{
	struct pci_dev *nb_ht;
	unsigned int devfn;
	u32 node;
	u32 val;

	devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
	nb_ht = pci_get_slot(dev->bus, devfn);
	if (!nb_ht)
		return;

	pci_read_config_dword(nb_ht, 0x60, &val);
	node = pcibus_to_node(dev->bus) | (val & 7);
	/*
	 * Some hardware may return an invalid node ID,
	 * so check it first:
	 */
	if (node_online(node))
		set_dev_node(&dev->dev, node);
	pci_dev_put(nb_ht);
}

/*
 * Tell the hypervisor how to contact us for event channel callbacks.
 */
static void
xenpci_set_callback(device_t dev)
{
	int irq;
	uint64_t callback;
	struct xen_hvm_param xhp;

	irq = pci_get_irq(dev);
	if (irq < 16) {
		callback = irq;
	} else {
		callback = (pci_get_intpin(dev) - 1) & 3;
		callback |= pci_get_slot(dev) << 11;
		callback |= 1ull << 56;
	}

	xhp.domid = DOMID_SELF;
	xhp.index = HVM_PARAM_CALLBACK_IRQ;
	xhp.value = callback;
	if (HYPERVISOR_hvm_op(HVMOP_set_param, &xhp))
		panic("Can't set evtchn callback");
}

/*
 * Attach an interface that successfully probed.
 */
static int
xlp_rsa_attach(device_t dev)
{
	struct xlp_rsa_softc *sc = device_get_softc(dev);
	uint64_t base;
	int qstart, qnum;
	int freq, node;

	sc->sc_dev = dev;

	node = nlm_get_device_node(pci_get_slot(dev));
	freq = nlm_set_device_frequency(node, DFS_DEVICE_RSA, 250);
	if (bootverbose)
		device_printf(dev, "RSA Freq: %dMHz\n", freq);
	if (pci_get_device(dev) == PCI_DEVICE_ID_NLM_RSA) {
		device_set_desc(dev, "XLP RSA/ECC Accelerator");
		if ((sc->sc_cid = crypto_get_driverid(dev,
		    CRYPTOCAP_F_HARDWARE)) < 0) {
			printf("xlp_rsaecc-err:couldn't get the driver id\n");
			goto error_exit;
		}
		if (crypto_kregister(sc->sc_cid, CRK_MOD_EXP, 0) != 0)
			goto error_exit;

		base = nlm_get_rsa_pcibase(node);
		qstart = nlm_qidstart(base);
		qnum = nlm_qnum(base);
		sc->rsaecc_vc_start = qstart;
		sc->rsaecc_vc_end = qstart + qnum - 1;
	}
	if (xlp_rsa_init(sc, node) != 0)
		goto error_exit;
	device_printf(dev, "RSA Initialization complete!\n");
	return (0);

error_exit:
	return (ENXIO);
}

static int
ppt_probe(device_t dev)
{
	int bus, slot, func;
	struct pci_devinfo *dinfo;

	dinfo = (struct pci_devinfo *)device_get_ivars(dev);

	bus = pci_get_bus(dev);
	slot = pci_get_slot(dev);
	func = pci_get_function(dev);

	/*
	 * To qualify as a pci passthrough device a device must:
	 * - be allowed by administrator to be used in this role
	 * - be an endpoint device
	 */
	if (vmm_is_pptdev(bus, slot, func) &&
	    (dinfo->cfg.hdrtype & PCIM_HDRTYPE) == PCIM_HDRTYPE_NORMAL)
		return (0);
	else
		return (ENXIO);
}