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C++ pci_dev_read_resources函数代码示例

原作者: [db:作者] 来自: [db:来源] 收藏 邀请

本文整理汇总了C++中pci_dev_read_resources函数的典型用法代码示例。如果您正苦于以下问题：C++ pci_dev_read_resources函数的具体用法？C++ pci_dev_read_resources怎么用？C++ pci_dev_read_resources使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。



在下文中一共展示了pci_dev_read_resources函数的20个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于我们的系统推荐出更棒的C++代码示例。

示例1: lpc_read_resources

void lpc_read_resources(device_t dev)
{
	struct resource *res;

	printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_read_resources - Start.\n");
	/* Get the normal pci resources of this device */
	pci_dev_read_resources(dev);	/* We got one for APIC, or one more for TRAP */

	pci_get_resource(dev, SPIROM_BASE_ADDRESS); /* SPI ROM base address */

	/* Add an extra subtractive resource for both memory and I/O. */
	res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
	res->base = 0;
	res->size = 0x1000;
	res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
	res->base = 0xff800000;
	res->size = 0x00800000; /* 8 MB for flash */
	res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	res = new_resource(dev, 3); /* IOAPIC */
	res->base = 0xfec00000;
	res->size = 0x00001000;
	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	compact_resources(dev);
	printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_read_resources - End.\n");
}
开发者ID:XVilka，项目名称:coreboot，代码行数:31，代码来源:lpc.c


示例2: pch_lpc_read_resources

static void pch_lpc_read_resources(device_t dev)
{
	struct resource *res;
	config_t *config = dev->chip_info;
	u8 io_index = 0;

	/* Get the normal PCI resources of this device. */
	pci_dev_read_resources(dev);

	/* Add an extra subtractive resource for both memory and I/O. */
	res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0));
	res->base = 0;
	res->size = 0x1000;
	res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0));
	res->base = 0xff800000;
	res->size = 0x00800000; /* 8 MB for flash */
	res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	res = new_resource(dev, 3); /* IOAPIC */
	res->base = IO_APIC_ADDR;
	res->size = 0x00001000;
	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	/* Set PCH IO decode ranges if required.*/
	if ((config->gen1_dec & 0xFFFC) > 0x1000) {
		res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0));
		res->base = config->gen1_dec & 0xFFFC;
		res->size = (config->gen1_dec >> 16) & 0xFC;
		res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
				 IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
	}
开发者ID:lynxis，项目名称:coreboot-signed，代码行数:35，代码来源:lpc.c


示例3: nc_read_resources

static void nc_read_resources(struct device *dev)
{
	unsigned long mmconf;
	unsigned long bmbound;
	unsigned long bmbound_hi;
	unsigned long smmrrh;
	unsigned long smmrrl;
	unsigned long base_k, size_k;
	const unsigned long four_gig_kib = (4 << (30 - 10));
	int index = 0;

	/* Read standard PCI resources. */
	pci_dev_read_resources(dev);

	/* PCIe memory-mapped config space access - 256 MiB. */
	mmconf = iosf_bunit_read(BUNIT_MMCONF_REG) & ~((1 << 28) - 1);
	mmio_resource(dev, BUNIT_MMCONF_REG, RES_IN_KiB(mmconf), 256 * 1024);

	/* 0 -> 0xa0000 */
	base_k = RES_IN_KiB(0);
	size_k = RES_IN_KiB(0xa0000) - base_k;
	ram_resource(dev, index++, base_k, size_k);

	/* The SMMRR registers are 1MiB granularity with smmrrh being
	 * inclusive of the SMM region. */
	smmrrl = (iosf_bunit_read(BUNIT_SMRRL) & 0xffff) << 10;
	smmrrh = ((iosf_bunit_read(BUNIT_SMRRH) & 0xffff) + 1) << 10;

	/* 0xc0000 -> smrrl - cacheable and usable */
	base_k = RES_IN_KiB(0xc0000);
	size_k = smmrrl - base_k;
	ram_resource(dev, index++, base_k, size_k);

	if (smmrrh > smmrrl)
		reserved_ram_resource(dev, index++, smmrrl, smmrrh - smmrrl);

	/* All address space between bmbound and smmrrh is unusable. */
	bmbound = RES_IN_KiB(nc_read_top_of_low_memory());
	mmio_resource(dev, index++, smmrrh, bmbound - smmrrh);

	/* The BMBOUND_HI register matches register bits of 31:24 with address
	 * bits of 35:28. Therefore, shift register to align properly. */
	bmbound_hi = iosf_bunit_read(BUNIT_BMBOUND_HI) & ~((1 << 24) - 1);
	bmbound_hi = RES_IN_KiB(bmbound_hi) << 4;
	if (bmbound_hi > four_gig_kib)
		ram_resource(dev, index++, four_gig_kib,
		             bmbound_hi - four_gig_kib);

	/* Reserve everything between A segment and 1MB:
	 *
	 * 0xa0000 - 0xbffff: legacy VGA
	 * 0xc0000 - 0xfffff: RAM
	 */
	mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
	reserved_ram_resource(dev, index++, (0xc0000 >> 10),
	                      (0x100000 - 0xc0000) >> 10);

	if (CONFIG(CHROMEOS))
		chromeos_reserve_ram_oops(dev, index++);
}
开发者ID:canistation，项目名称:coreboot，代码行数:60，代码来源:northcluster.c


示例4: pci_pmc_read_resources

static void pci_pmc_read_resources(struct device *dev)
{
	struct resource *res;

	/* Get the normal PCI resources of this device. */
	pci_dev_read_resources(dev);

	/* Add MMIO resource
	 * Use 0xaa as an unused index for PWRM BAR.
	 */
	u32 reg32 = pci_read_config32(dev, PMC_PWRM_BASE) & MASK_PMC_PWRM_BASE;
	if ((reg32 != 0x0) && (reg32 != 0xffffffff)) {
		res = new_resource(dev, 0xaa);
		res->base = reg32;
		res->size = 64 * 1024; /* 64K bytes memory config space */
		res->flags =
			IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
		printk(BIOS_DEBUG,
		       "Adding PMC PWRM config space BAR 0x%08lx-0x%08lx.\n",
		       (unsigned long)(res->base),
		       (unsigned long)(res->base + res->size));
	}

	/* Add MMIO resource
	 * Use 0xab as an unused index for ACPI BAR.
	 */
	u16 reg16 = pci_read_config16(dev, PMC_ACPI_BASE) & MASK_PMC_ACPI_BASE;
	if ((reg16 != 0x0) && (reg16 != 0xffff)) {
		res = new_resource(dev, 0xab);
		res->base = reg16;
		res->size = 0x100; /* 256 bytes I/O config space */
		res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
			     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
	}
}
开发者ID:canistation，项目名称:coreboot，代码行数:35，代码来源:pmc.c


示例5: sb600_lpc_read_resources

static void sb600_lpc_read_resources(device_t dev)
{
	struct resource *res;

	/* Get the normal pci resources of this device */
	pci_dev_read_resources(dev);	/* We got one for APIC, or one more for TRAP */

	pci_get_resource(dev, 0xA0); /* SPI ROM base address */

	/* Add an extra subtractive resource for both memory and I/O. */
	res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
	res->base = 0;
	res->size = 0x1000;
	res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
	res->base = 0xff800000;
	res->size = 0x00800000; /* 8 MB for flash */
	res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	res = new_resource(dev, 3); /* IOAPIC */
	res->base = IO_APIC_ADDR;
	res->size = 0x00001000;
	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	compact_resources(dev);
}
开发者ID:tidatida，项目名称:coreboot，代码行数:29，代码来源:lpc.c


示例6: sch_lpc_read_resources

static void sch_lpc_read_resources(device_t dev)
{
	struct resource *res;

	/* Get the normal PCI resources of this device. */
	pci_dev_read_resources(dev);

	/* Add an extra subtractive resource for both memory and I/O. */
	res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
	res->base = 0;
	res->size = 0xe000;
	res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
	res->base = 0xff800000;
	res->size = 0x00800000; /* 8 MB for flash */
	res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

	res = new_resource(dev, 3);
	res->base = IO_APIC_ADDR;
	res->size = 0x00001000;
	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
开发者ID:AdriDlu，项目名称:coreboot，代码行数:25，代码来源:lpc.c


示例7: lpc_read_resources

void lpc_read_resources(device_t dev)
{
    struct resource *res;

    printk(BIOS_SPEW, "SB700 - Lpc.c - %s - Start.\n", __func__);
    /* Get the normal pci resources of this device */
    pci_dev_read_resources(dev);	/* We got one for APIC, or one more for TRAP */

    /* Add an extra subtractive resource for both memory and I/O. */
    res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
    res->base = 0;
    res->size = 0x1000;
    res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
                 IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

    res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
    res->base = 0xff800000;
    res->size = 0x00800000; /* 8 MB for flash */
    res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
                 IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

    /* Add a memory resource for the SPI BAR. */
    fixed_mem_resource(dev, 2, SPI_BASE_ADDRESS / 1024, 1, IORESOURCE_SUBTRACTIVE);

    res = new_resource(dev, 3);
    res->base = IO_APIC_ADDR;
    res->size = 0x00001000;
    res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

    compact_resources(dev);
    printk(BIOS_SPEW, "SB700 - Lpc.c - %s - End.\n", __func__);
}
开发者ID:RafaelRMachado，项目名称:Coreboot，代码行数:32，代码来源:lpc.c


示例8: soc_lpc_read_resources

static void soc_lpc_read_resources(device_t dev)
{
	/* Get the PCI resources of this device. */
	pci_dev_read_resources(dev);

	/* Add IO resources to LPC. */
	soc_lpc_add_io_resources(dev);
}
开发者ID:lynxis，项目名称:coreboot-signed，代码行数:8，代码来源:lpc.c


示例9: lpe_read_resources

static void lpe_read_resources(device_t dev)
{
	pci_dev_read_resources(dev);

	reserved_ram_resource(dev, FIRMWARE_PCI_REG_BASE,
			      FIRMWARE_PHYS_BASE >> 10,
			      FIRMWARE_PHYS_LENGTH >> 10);
}
开发者ID:AdriDlu，项目名称:coreboot，代码行数:8，代码来源:lpe.c


示例10: qemu_nb_read_resources

static void qemu_nb_read_resources(struct device *dev)
{
	pci_dev_read_resources(dev);

	/* reserve mmconfig */
	fixed_mem_resource(dev, 2, CONFIG_MMCONF_BASE_ADDRESS >> 10, 0x10000000 >> 10,
			   IORESOURCE_RESERVE);
}
开发者ID:AdriDlu，项目名称:coreboot，代码行数:8，代码来源:mainboard.c


示例11: nc_read_resources

static void nc_read_resources(device_t dev)
{
	/* Call the normal read_resources */
	pci_dev_read_resources(dev);


	/* Calculate and add DRAM resources. */
	mc_add_dram_resources(dev);
}
开发者ID:MrTomasz，项目名称:coreboot，代码行数:9，代码来源:northcluster.c


示例12: sb700_sm_read_resources

static void sb700_sm_read_resources(device_t dev)
{
	struct resource *res;

	/* Get the normal pci resources of this device */
	pci_dev_read_resources(dev);

	/* apic */
	res = new_resource(dev, 0x74);
	res->base  = IO_APIC_ADDR;
	res->size = 256 * 0x10;
	res->limit = 0xFFFFFFFFUL;	/* res->base + res->size -1; */
	res->align = 8;
	res->gran = 8;
	res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_ASSIGNED;

	/* SB MMIO / WDT */
	res = new_resource(dev, SB_MMIO_CFG_REG);
	res->base  = SB_MMIO_BASE_ADDRESS;
	res->size = 0x1000;
	res->limit = 0xFFFFFFFFUL;	/* res->base + res->size -1; */
	res->align = 8;
	res->gran = 8;
	res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_ASSIGNED;

	/* HPET */
	res = new_resource(dev, 0xB4);	/* TODO: test hpet */
	res->base  = 0xfed00000;	/* reset hpet to widely accepted address */
	res->size = 0x400;
	res->limit = 0xFFFFFFFFUL;	/* res->base + res->size -1; */
	res->align = 8;
	res->gran = 8;
	res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_ASSIGNED;

	/* dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; */

	/* primary smbus */
	res = new_resource(dev, PRIMARY_SMBUS_RESOURCE_NUMBER);
	res->base  = SMBUS_IO_BASE;
	res->size = 0x10;
	res->limit = 0xFFFFUL;	/* res->base + res->size -1; */
	res->align = 8;
	res->gran = 8;
	res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_ASSIGNED;

	/* auxiliary smbus */
	res = new_resource(dev, AUXILIARY_SMBUS_RESOURCE_NUMBER);
	res->base  = SMBUS_AUX_IO_BASE;
	res->size = 0x10;
	res->limit = 0xFFFFUL;	/* res->base + res->size -1; */
	res->align = 8;
	res->gran = 8;
	res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_ASSIGNED;

	compact_resources(dev);
}
开发者ID:AdriDlu，项目名称:coreboot，代码行数:56，代码来源:sm.c


示例13: rd890_read_resource

static void rd890_read_resource(struct device *dev)
{
	pci_dev_read_resources(dev);

	/* rpr6.2.(1). Write the Base Address Register (BAR) */
	pci_write_config32(dev, 0xF8, 0x1); /* set IOAPIC's index as 1 and make sure no one changes it. */
	pci_get_resource(dev, 0xFC); /* APIC located in sr5690 */

	compact_resources(dev);
}
开发者ID:tidatida，项目名称:coreboot，代码行数:10，代码来源:late.c


示例14: bcm5785_ide_read_resources

static void bcm5785_ide_read_resources(device_t dev)
{
        /* Get the normal pci resources of this device */
        pci_dev_read_resources(dev);

        /* BAR */
        pci_get_resource(dev, 0x64);

        compact_resources(dev);
}
开发者ID:kelsieflynn，项目名称:coreboot-1，代码行数:10，代码来源:bcm5785_ide.c


示例15: aplk_uart_read_resources

static void aplk_uart_read_resources(struct device *dev)
{
	pci_dev_read_resources(dev);

	if ((IS_ENABLED(CONFIG_SOC_UART_DEBUG) &&
	    dev->path.pci.devfn == _PCH_DEVFN(UART,
						CONFIG_UART_FOR_CONSOLE))) {
		/* will override existing resource. */
		fixed_mem_resource(dev, PCI_BASE_ADDRESS_0,
				CONFIG_CONSOLE_UART_BASE_ADDRESS >> 10, 4, 0);
	}
开发者ID:lynxis，项目名称:coreboot-signed，代码行数:11，代码来源:uart.c


示例16: pch_pmc_read_resources

static void pch_pmc_read_resources(device_t dev)
{
	/* Get the normal PCI resources of this device. */
	pci_dev_read_resources(dev);

	/* Add non-standard MMIO resources. */
	pch_pmc_add_mmio_resources(dev);

	/* Add IO resources. */
	pch_pmc_add_io_resources(dev);
}
开发者ID:Oxyoptia，项目名称:coreboot，代码行数:11，代码来源:pmc.c


示例17: mcp55_sm_read_resources

static void mcp55_sm_read_resources(device_t dev)
{
    unsigned long index;

    /* Get the normal pci resources of this device */
    pci_dev_read_resources(dev);

    for (index = 0x60; index <= 0x68; index+=4) { // We got another 3.
        pci_get_resource(dev, index);
    }
    compact_resources(dev);
}
开发者ID:kelsieflynn，项目名称:coreboot-1，代码行数:12，代码来源:mcp55_smbus.c


示例18: vx800_read_resources

/* total kludge to get lxb to call our childrens set/enable functions - these are
   not called unless this device has a resource to set - so set a dummy one */
static void vx800_read_resources(device_t dev)
{

	struct resource *resource;
	pci_dev_read_resources(dev);
	resource = new_resource(dev, 1);
	resource->flags |=
	    IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO |
	    IORESOURCE_STORED;
	resource->size = 2;
	resource->base = 0x2e;
}
开发者ID:RafaelRMachado，项目名称:Coreboot，代码行数:14，代码来源:lpc.c


示例19: uart_read_resources

static void uart_read_resources(device_t dev)
{
	struct resource *res;

	/* Read the resources */
	pci_dev_read_resources(dev);

	/* Set the debug port configuration */
	res = find_resource(dev, PCI_BASE_ADDRESS_0);
	res->base = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
	res->size = 0x100;
	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
开发者ID:AdriDlu，项目名称:coreboot，代码行数:13，代码来源:uart.c


示例20: pch_uart_read_resources

static void pch_uart_read_resources(struct device *dev)
{
	pci_dev_read_resources(dev);

	/* Set the configured UART base address for the debug port */
	if (IS_ENABLED(CONFIG_UART_DEBUG) && pch_uart_is_debug(dev)) {
		struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
		/* Need to set the base and size for the resource allocator. */
		res->base = UART_DEBUG_BASE_ADDRESS;
		res->size = UART_DEBUG_BASE_SIZE;
		res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED |
			IORESOURCE_FIXED;
	}
}
开发者ID:lynxis，项目名称:coreboot-signed，代码行数:14，代码来源:uart.c



注：本文中的pci_dev_read_resources函数示例由纯净天空整理自Github/MSDocs等源码及文档管理平台，相关代码片段筛选自各路编程大神贡献的开源项目，源码版权归原作者所有，传播和使用请参考对应项目的License；未经允许，请勿转载。

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