本文整理汇总了C++中outb函数的典型用法代码示例。如果您正苦于以下问题：C++ outb函数的具体用法？C++ outb怎么用？C++ outb使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了outb函数的20个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: EvtUnlockedIoDeviceControl
//___________________________________________________________________________________________
long EvtUnlockedIoDeviceControl(struct file* filep, unsigned int cmd, unsigned long arg)
{
int iTimeoutMs, iSize; //used by interrupt and record
DeviceContext *d = filep->private_data;
switch(cmd)
{
case 'r': //get record, arg contains pointer to buffer containing timeout and size, and arg returns pointer to record
if( copy_from_user(&iSize, (int*)arg, sizeof(iSize)) ) //get data from user space in arg (e.g. 1000) and copy to kernel buffer (iTimeoutMs)
return -EFAULT;
if( copy_from_user(&iTimeoutMs, (int*) (arg + sizeof(iSize)), sizeof(iTimeoutMs)) ) //get data from user space in arg (e.g. 1000) and copy to kernel buffer (iTimeoutMs)
return -EFAULT;
if (iTimeoutMs > 0) //positive timeout
wait_event_interruptible_timeout(d->recordWaitQ, d->recordQ.in != d->recordQ.out, iTimeoutMs * HZ / 1000); //wait up to the timeout for the IRQ byte to be set by the IRQ handler (wait for the circular buffer to be non-empty)
else if(iTimeoutMs < 0) //negative timeout (timeout disabled)
wait_event_interruptible(d->recordWaitQ, d->recordQ.in != d->recordQ.out); //wait forever
if(d->recordQ.in != d->recordQ.out) //q non empty
{
if(copy_to_user((char*)arg, d->recordQ.q[ d->recordQ.out ], iSize)) //return the record retrieved in the interrupt handler to users space in arg
return -EFAULT;
d->recordQ.out = (d->recordQ.out + 1) % SIZE; //increment the read pointer
}
else //wait_event was interrupted by a signal (e.g. ctrl-c) < 0, or timeout = 0
return -ERESTARTSYS; //user mode ioctl returns -1
break;
case 'i': //interrupt (get EI/UI status byte). arg contains pointer to timeout, and arg returns pointer to status byte
if( copy_from_user(&iTimeoutMs, (int*)arg, sizeof(iTimeoutMs)) ) //get data from user space in arg (e.g. 1000) and copy to kernel buffer (iTimeoutMs)
return -EFAULT;
if (iTimeoutMs > 0) //positive timeout
wait_event_interruptible_timeout(d->interruptWaitQ, d->interruptQ.in != d->interruptQ.out, iTimeoutMs * HZ / 1000); //wait up to the timeout for the IRQ byte to be set by the IRQ handler (wait for the circular buffer to be non-empty)
else if(iTimeoutMs < 0) //negative timeout (timeout disabled)
wait_event_interruptible(d->interruptWaitQ, d->interruptQ.in != d->interruptQ.out); //wait forever
if(d->interruptQ.in != d->interruptQ.out) //q non empty
{
if(copy_to_user((int*)arg, &(d->interruptQ.q[ d->interruptQ.out ]), sizeof(unsigned char))) //return the status byte retrieved in the interrupt handler to users space in arg
return -EFAULT;
d->interruptQ.out = (d->interruptQ.out + 1) % SIZE; //increment the read pointer
}
else //wait_event was interrupted by a signal (e.g. ctrl-c) < 0, or timeout = 0
return -ERESTARTSYS; //user mode ioctl returns -1
break;
case 'R': //reset DMC-18x0/6
if(d->pciInfo.m_fSubSystem == DMC18x6) //18x6 (do nothing on 18x2)
outb(0x80, d->baseAddress + 8); //reset 18x6
break;
case 'v':
printk(KERN_INFO "GalilIoctl IOCTL_GALIL_VERSION\n");
if (copy_to_user((char*)arg, "galiltools", strlen("galiltools")))
return -EACCES;
break;
default:
return -ENOTTY; //invalid ioctl code (switch fell thru). POSIX says we should return -ENOTTY instead of EINVAL
}
return 0; //normal
}
开发者ID:MedicalRobotics，项目名称:wylin_code，代码行数:70，代码来源:galilpci.c
示例2: fWrite_hfc8
static inline void
fWrite_hfc8(hfc4s8s_hw *a, u_char c)
{
outb(c, a->iobase);
}
开发者ID:168519，项目名称:linux，代码行数:5，代码来源:hfc4s8s_l1.c
示例3: pic_send_eoi
void pic_send_eoi(unsigned char irq)
{
outb(PIC1_COMMAND, PIC_EOI);
if (irq >= 32 + 8)
outb(PIC2_COMMAND, PIC_EOI);
}
开发者ID:deb0ch，项目名称:yolok，代码行数:6，代码来源:irq.c
示例4: ide_outb
static void ide_outb (u8 val, unsigned long port)
{
outb(val, port);
}
开发者ID:mobilipia，项目名称:iods，代码行数:4，代码来源:ide-iops.c
示例5: SetRegAddr
/* inline functions io mapped */
static inline void
SetRegAddr(hfc4s8s_hw *a, u_char b)
{
outb(b, (a->iobase) + 4);
}
开发者ID:168519，项目名称:linux，代码行数:6，代码来源:hfc4s8s_l1.c
示例6: irq_8259_mask
PUBLIC void irq_8259_mask(const int irq)
{
const unsigned ctl_mask = irq < 8 ? INT_CTLMASK : INT2_CTLMASK;
outb(ctl_mask, inb(ctl_mask) | (1 << (irq & 0x7)));
}
开发者ID:biswajit1983，项目名称:minix-nbsd，代码行数:5，代码来源:i8259.c
示例7: cgaregr
static uchar
cgaregr(int index)
{
outb(0x3D4, index);
return inb(0x3D4+1) & 0xFF;
}
开发者ID:CoryXie，项目名称:NxM，代码行数:6，代码来源:cga.c
示例8: quirk_wakeup_oxsemi
static void quirk_wakeup_oxsemi(struct pcmcia_device *link)
{
struct serial_info *info = link->priv;
outb(12, info->c950ctrl + 1);
}
开发者ID:274914765，项目名称:C，代码行数:6，代码来源:serial_cs.c
示例9: host_control_smi
/**
* host_control_smi: generate host control SMI
*
* Caller must set up the host control command in smi_data_buf.
*/
static int host_control_smi(void)
{
struct apm_cmd *apm_cmd;
u8 *data;
unsigned long flags;
u32 num_ticks;
s8 cmd_status;
u8 index;
apm_cmd = (struct apm_cmd *)smi_data_buf;
apm_cmd->status = ESM_STATUS_CMD_UNSUCCESSFUL;
switch (host_control_smi_type) {
case HC_SMITYPE_TYPE1:
spin_lock_irqsave(&rtc_lock, flags);
/* write SMI data buffer physical address */
data = (u8 *)&smi_data_buf_phys_addr;
for (index = PE1300_CMOS_CMD_STRUCT_PTR;
index < (PE1300_CMOS_CMD_STRUCT_PTR + 4);
index++, data++) {
outb(index,
(CMOS_BASE_PORT + CMOS_PAGE2_INDEX_PORT_PIIX4));
outb(*data,
(CMOS_BASE_PORT + CMOS_PAGE2_DATA_PORT_PIIX4));
}
/* first set status to -1 as called by spec */
cmd_status = ESM_STATUS_CMD_UNSUCCESSFUL;
outb((u8) cmd_status, PCAT_APM_STATUS_PORT);
/* generate SMM call */
outb(ESM_APM_CMD, PCAT_APM_CONTROL_PORT);
spin_unlock_irqrestore(&rtc_lock, flags);
/* wait a few to see if it executed */
num_ticks = TIMEOUT_USEC_SHORT_SEMA_BLOCKING;
while ((cmd_status = inb(PCAT_APM_STATUS_PORT))
== ESM_STATUS_CMD_UNSUCCESSFUL) {
num_ticks--;
if (num_ticks == EXPIRED_TIMER)
return -ETIME;
}
break;
case HC_SMITYPE_TYPE2:
case HC_SMITYPE_TYPE3:
spin_lock_irqsave(&rtc_lock, flags);
/* write SMI data buffer physical address */
data = (u8 *)&smi_data_buf_phys_addr;
for (index = PE1400_CMOS_CMD_STRUCT_PTR;
index < (PE1400_CMOS_CMD_STRUCT_PTR + 4);
index++, data++) {
outb(index, (CMOS_BASE_PORT + CMOS_PAGE1_INDEX_PORT));
outb(*data, (CMOS_BASE_PORT + CMOS_PAGE1_DATA_PORT));
}
/* generate SMM call */
if (host_control_smi_type == HC_SMITYPE_TYPE3)
outb(ESM_APM_CMD, PCAT_APM_CONTROL_PORT);
else
outb(ESM_APM_CMD, PE1400_APM_CONTROL_PORT);
/* restore RTC index pointer since it was written to above */
CMOS_READ(RTC_REG_C);
spin_unlock_irqrestore(&rtc_lock, flags);
/* read control port back to serialize write */
cmd_status = inb(PE1400_APM_CONTROL_PORT);
/* wait a few to see if it executed */
num_ticks = TIMEOUT_USEC_SHORT_SEMA_BLOCKING;
while (apm_cmd->status == ESM_STATUS_CMD_UNSUCCESSFUL) {
num_ticks--;
if (num_ticks == EXPIRED_TIMER)
return -ETIME;
}
break;
default:
dev_dbg(&dcdbas_pdev->dev, "%s: invalid SMI type %u\n",
__func__, host_control_smi_type);
return -ENOSYS;
}
return 0;
}
开发者ID:Atrix-Dev-Team，项目名称:kernel-MB860，代码行数:91，代码来源:dcdbas.c
示例10: setup_hfcs
int __devinit
setup_hfcs(struct IsdnCard *card)
{
struct IsdnCardState *cs = card->cs;
char tmp[64];
strcpy(tmp, hfcs_revision);
printk(KERN_INFO "HiSax: HFC-S driver Rev. %s\n", HiSax_getrev(tmp));
#ifdef __ISAPNP__
if (!card->para[1] && isapnp_present()) {
struct pnp_dev *pnp_d;
while(ipid->card_vendor) {
if ((pnp_c = pnp_find_card(ipid->card_vendor,
ipid->card_device, pnp_c))) {
pnp_d = NULL;
if ((pnp_d = pnp_find_dev(pnp_c,
ipid->vendor, ipid->function, pnp_d))) {
int err;
printk(KERN_INFO "HiSax: %s detected\n",
(char *)ipid->driver_data);
pnp_disable_dev(pnp_d);
err = pnp_activate_dev(pnp_d);
if (err<0) {
printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
__func__, err);
return(0);
}
card->para[1] = pnp_port_start(pnp_d, 0);
card->para[0] = pnp_irq(pnp_d, 0);
if (!card->para[0] || !card->para[1]) {
printk(KERN_ERR "HFC PnP:some resources are missing %ld/%lx\n",
card->para[0], card->para[1]);
pnp_disable_dev(pnp_d);
return(0);
}
break;
} else {
printk(KERN_ERR "HFC PnP: PnP error card found, no device\n");
}
}
ipid++;
pnp_c = NULL;
}
if (!ipid->card_vendor) {
printk(KERN_INFO "HFC PnP: no ISAPnP card found\n");
return(0);
}
}
#endif
cs->hw.hfcD.addr = card->para[1] & 0xfffe;
cs->irq = card->para[0];
cs->hw.hfcD.cip = 0;
cs->hw.hfcD.int_s1 = 0;
cs->hw.hfcD.send = NULL;
cs->bcs[0].hw.hfc.send = NULL;
cs->bcs[1].hw.hfc.send = NULL;
cs->hw.hfcD.dfifosize = 512;
cs->dc.hfcd.ph_state = 0;
cs->hw.hfcD.fifo = 255;
if (cs->typ == ISDN_CTYPE_TELES3C) {
cs->hw.hfcD.bfifosize = 1024 + 512;
} else if (cs->typ == ISDN_CTYPE_ACERP10) {
cs->hw.hfcD.bfifosize = 7*1024 + 512;
} else
return (0);
if (!request_region(cs->hw.hfcD.addr, 2, "HFCS isdn")) {
printk(KERN_WARNING
"HiSax: %s config port %x-%x already in use\n",
CardType[card->typ],
cs->hw.hfcD.addr,
cs->hw.hfcD.addr + 2);
return (0);
}
printk(KERN_INFO
"HFCS: defined at 0x%x IRQ %d HZ %d\n",
cs->hw.hfcD.addr,
cs->irq, HZ);
if (cs->typ == ISDN_CTYPE_TELES3C) {
/* Teles 16.3c IO ADR is 0x200 | YY0U (YY Bit 15/14 address) */
outb(0x00, cs->hw.hfcD.addr);
outb(0x56, cs->hw.hfcD.addr | 1);
} else if (cs->typ == ISDN_CTYPE_ACERP10) {
/* Acer P10 IO ADR is 0x300 */
outb(0x00, cs->hw.hfcD.addr);
outb(0x57, cs->hw.hfcD.addr | 1);
}
set_cs_func(cs);
cs->hw.hfcD.timer.function = (void *) hfcs_Timer;
cs->hw.hfcD.timer.data = (long) cs;
init_timer(&cs->hw.hfcD.timer);
cs->cardmsg = &hfcs_card_msg;
cs->irq_func = &hfcs_interrupt;
return (1);
}
开发者ID:458941968，项目名称:mini2440-kernel-2.6.29，代码行数:96，代码来源:hfcscard.c
示例11: w_EepromReadWord
unsigned short w_EepromReadWord(unsigned short w_PCIBoardEepromAddress, char *pc_PCIChipInformation,
unsigned short w_EepromStartAddress)
{
unsigned char b_Counter = 0;
unsigned char b_ReadByte = 0;
unsigned char b_ReadLowByte = 0;
unsigned char b_ReadHighByte = 0;
unsigned char b_SelectedAddressLow = 0;
unsigned char b_SelectedAddressHigh = 0;
unsigned short w_ReadWord = 0;
/**************************/
/* Test the PCI chip type */
/**************************/
if ((!strcmp(pc_PCIChipInformation, "S5920")) ||
(!strcmp(pc_PCIChipInformation, "S5933")))
{
for (b_Counter = 0; b_Counter < 2; b_Counter++)
{
b_SelectedAddressLow = (w_EepromStartAddress + b_Counter) % 256; /* Read the low 8 bit part */
b_SelectedAddressHigh = (w_EepromStartAddress + b_Counter) / 256; /* Read the high 8 bit part */
/************************************/
/* Select the load low address mode */
/************************************/
outb(NVCMD_LOAD_LOW, w_PCIBoardEepromAddress + 0x3F);
/****************/
/* Wait on busy */
/****************/
v_EepromWaitBusy(w_PCIBoardEepromAddress);
/************************/
/* Load the low address */
/************************/
outb(b_SelectedAddressLow,
w_PCIBoardEepromAddress + 0x3E);
/****************/
/* Wait on busy */
/****************/
v_EepromWaitBusy(w_PCIBoardEepromAddress);
/*************************************/
/* Select the load high address mode */
/*************************************/
outb(NVCMD_LOAD_HIGH, w_PCIBoardEepromAddress + 0x3F);
/****************/
/* Wait on busy */
/****************/
v_EepromWaitBusy(w_PCIBoardEepromAddress);
/*************************/
/* Load the high address */
/*************************/
outb(b_SelectedAddressHigh,
w_PCIBoardEepromAddress + 0x3E);
/****************/
/* Wait on busy */
/****************/
v_EepromWaitBusy(w_PCIBoardEepromAddress);
//.........这里部分代码省略.........
开发者ID:325116067，项目名称:semc-qsd8x50，代码行数:101，代码来源:addi_eeprom.c
示例12: EvtDevicePrepareHardware
//.........这里部分代码省略.........
pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &uModel); //read galil model (e.g. 0x1806)
d[device].pciInfo.m_fSubVendor = subVender;
d[device].pciInfo.m_fSubSystem = uModel;
//register the device under major number 10. Minor number will show up in /proc/misc
d[device].galilpci_miscdev.minor = MISC_DYNAMIC_MINOR, //assign the minor number dynamically (ask for a free one). This field will eventually contain the actual minor number.
sprintf(name, GALILNAME "%i", device);
d[device].galilpci_miscdev.name = name, //the name for this device, meant for human consumption: users will find the name in the /proc/misc file.
d[device].galilpci_miscdev.fops = &galilpci_fops, //the file operations
d[device].bOpen = 0; //file not open
ret = misc_register(&(d[device].galilpci_miscdev));
if (ret) {
printk ("EvtDevicePrepareHardware cannot register miscdev (err=%d)\n", ret);
goto release_regions;
}
init_waitqueue_head(&d[device].sleepQ);
//INTERRUPTS
d[device].interrupt = pdev->irq; //store the IRQ number so we can call free-irq in the cleanup function when the module us removed with rmmod
if (request_irq(d[device].interrupt, EvtInterruptIsr, IRQF_SHARED, GALILNAME, &d[device])) //register the interrupt handler. This should happen before we enable interrupts on the controller. Kernel 2.6.18 2006Sep changed SA_SHIRQ to IRQF_SHARED http://lwn.net/Articles/2.6-kernel-api/
{
printk("EvtDevicePrepareHardware IRQ %x is not free\n", d[device].interrupt);
goto misc_deregister;
}
init_waitqueue_head(&d[device].interruptWaitQ); //initialize the list of processes waiting for EI/UI interrupts
d[device].interruptQ.in = d[device].interruptQ.out = 0; //initialize circular buffer pointers
init_waitqueue_head(&d[device].recordWaitQ); //initialize the list of processes waiting for record interrupts
d[device].recordQ.in = d[device].recordQ.out = 0; //initialize circular buffer pointers
//ENABLE INTERRUPTS ON CONTROLLER
#if 1
switch (d[device].pciInfo.m_fSubSystem)
{
case DMC18x2:
inb( d[device].baseAddress + 1); //reset 4701 ("clear FIFOs"). Interrupts won't enable on 18x2 rev F without this (rev D1 doesn't require it)
outb(0x01, d[device].baseAddress + 1);
outb(0x80, d[device].baseAddress + 1);
outb(0x01, d[device].baseAddress + 1);
outb(0x80, d[device].baseAddress + 1);
inb( d[device].baseAddress + 1);
outb(0x02, d[device].baseAddress + 1); //set 4701 pointer register to point to the interrupt mask register (register 2)
outb(0x04, d[device].baseAddress + 1); //interrupt when the controller writes to its mailbox (don't interrupt on 6 full, 5 empty, 4 almost full, 3 almost empty, 1 byte detect, nor 0 parity/frame error
//below is necessary so 18x2 doesn't keep interrupting
outb(0x06, d[device].baseAddress + 1); //set 4701 pointer register to point to the other port's mailbox
inb ( d[device].baseAddress + 1); //read other port's mailbox (clears any pending mailbox interrupt)
d[device].irqAddress += 0x4c; //76 byte offset from the address in BAR1
outl( 0x40 | inl(d[device].irqAddress), d[device].irqAddress); //enable interrupts on the controller. They will stay enabled until the module is unloaded (or power is shut off)
break;
case DMC18x6:
case DMC18x0:
outb(0x40 | inb(d[device].baseAddress + 4), d[device].baseAddress + 4); //enable interrupts on the controller. They will stay enabled until the module is unloaded (or power is shut off)
break;
case DMC1417:
d[device].irqAddress += 0x4c;
outb(0x40 | inb(d[device].irqAddress), d[device].irqAddress); //enable interrupts on the controller. They will stay enabled until the module is unloaded (or power is shut off)
break;
case DMC1640:
default:
;
};
#else
if(d[device].irqAddress) //18x2
{
inb( d[device].baseAddress + 1); //reset 4701 ("clear FIFOs"). Interrupts won't enable on 18x2 rev F without this (rev D1 doesn't require it)
outb(0x01, d[device].baseAddress + 1);
outb(0x80, d[device].baseAddress + 1);
outb(0x01, d[device].baseAddress + 1);
outb(0x80, d[device].baseAddress + 1);
inb( d[device].baseAddress + 1);
outb(0x02, d[device].baseAddress + 1); //set 4701 pointer register to point to the interrupt mask register (register 2)
outb(0x04, d[device].baseAddress + 1); //interrupt when the controller writes to its mailbox (don't interrupt on 6 full, 5 empty, 4 almost full, 3 almost empty, 1 byte detect, nor 0 parity/frame error
//below is necessary so 18x2 doesn't keep interrupting
outb(0x06, d[device].baseAddress + 1); //set 4701 pointer register to point to the other port's mailbox
inb ( d[device].baseAddress + 1); //read other port's mailbox (clears any pending mailbox interrupt)
d[device].irqAddress += 0x4c; //76 byte offset from the address in BAR1
outl( 0x40 | inl(d[device].irqAddress), d[device].irqAddress); //enable interrupts on the controller. They will stay enabled until the module is unloaded (or power is shut off)
}
else //18x6
outb(0x40 | inb(d[device].baseAddress + 4), d[device].baseAddress + 4); //enable interrupts on the controller. They will stay enabled until the module is unloaded (or power is shut off)
#endif
printk("EvtDevicePrepareHardware I/O address (0x%lx), Model %x, minor number %d Rev(%i)\n",
d[device].baseAddress, uModel, d[device].galilpci_miscdev.minor, d[device].pciInfo.m_fRevsion);
return 0;
misc_deregister: misc_deregister(&(d[device].galilpci_miscdev)); //unregister the device with major number 10
release_regions: pci_release_regions(pdev);
disable_device: pci_disable_device(pdev);
device--; //update the device count
return ret;
}
开发者ID:MedicalRobotics，项目名称:wylin_code，代码行数:101，代码来源:galilpci.c
示例13: EvtInterruptIsr
//___________________________________________________________________________________________
static irqreturn_t EvtInterruptIsr(int irq, void *dev_id) // struct pt_regs *regs) //Kernel 2.6.19 removed regs argument http://lwn.net/Articles/202449/
{
unsigned char flagByte;
unsigned char statusByte; DeviceContext *d = dev_id; //get a pointer to the device. This was passed to request_irq()
int dataRecordSize;
#if 1
switch(d->pciInfo.m_fSubSystem)
{
case DMC18x2:
if(0x45 == (inl(d->irqAddress) & 0x45)) //this is our interrupt (bit 0 local interrupts enabled, bit 2 status (our)s, bit 6 enable (set below))
{
unsigned char status = inb(d->baseAddress + 1); //read 4701 status register (clear 4701 IRQ flag)
if(status & 0x04) //bit 2 means mailbox interrupt (controller sending status byte to PC)
{
outb(0x06, d->baseAddress + 1); //write 6 to N+1 (set 4701 pointer register to point to other port's mailbox)
statusByte = inb(d->baseAddress + 1); //read status byte (4701 other port's mailbox)
} else //controller probably set MR bit (bit 7) of 4701 (by hard resetting controller)
{
outb(0x02, d->baseAddress + 1); //set 4701 pointer register to point to the interrupt mask register (register 2)
outb(0x04, d->baseAddress + 1); //interrupt when the controller writes to its mailbox (don't interrupt on 6 full, 5 empty, 4 almost full, 3 almost empty, 1 byte detect, nor 0 parity/frame error
//below is necessary so 18x2 doesn't keep interrupting
outb(0x06, d->baseAddress + 1); //set 4701 pointer register to point to the other port's mailbox
inb(d->baseAddress + 1); //read other port's mailbox (clears any pending mailbox interrupt)
return IRQ_HANDLED; //Tell WDF, and hence Windows, that there WAS an interrupt outstanding for us to process
}
} else
return IRQ_NONE;
break;
case DMC18x6:
if(0x60 == (inb(d->baseAddress + 4) & 0x60)) //if the Galil controller generated an interrupt and interrupts were enabled on the controller
{
statusByte = inb(d->baseAddress + 8); //read status byte (must happen before acknowledging the interrupt below)
outb(0x20 | inb(d->baseAddress + 4), d->baseAddress + 4); //acknowledge the interrupt (else the controller will keep interrupting)
} else
return IRQ_NONE;
break;
case DMC1640:
case DMC18x0:
flagByte = inb(d->baseAddress + 4);
if ( d->pciInfo.m_fRevsion == REV1 )
{
if(0x60 == (flagByte & 0x60)) //if the Galil controller generated an interrupt and interrupts were enabled on the controller
{
statusByte = inb(d->baseAddress + 8); //read status byte (must happen before acknowledging the interrupt below)
outb(flagByte, d->baseAddress + 4); //acknowledge the interrupt (else the controller will keep interrupting)
} else
return IRQ_NONE;
} else
{
if(0x60 == (flagByte & 0x60)) //if the Galil controller generated an interrupt and interrupts were enabled on the controller
{
statusByte = inb(d->baseAddress + 8); //read status byte (must happen before acknowledging the interrupt below)
outb(0x20 | flagByte, d->baseAddress + 4); //acknowledge the interrupt (else the controller will keep interrupting)
} else
return IRQ_NONE;
}
break;
case DMC1417:
if(0x45 == (inb(d->irqAddress) & 0x45))
{
statusByte = 0xFF; // 1417 interrupt need to be read via IV command
outb(0x05, d->irqAddress + 1); // stop Interrupt
} else
return IRQ_NONE;
break;
default:
;
};
#else
if(d->irqAddress) //18x2
{
if(0x45 == (inl(d->irqAddress) & 0x45)) //this is our interrupt (bit 0 local interrupts enabled, bit 2 status (our)s, bit 6 enable (set below))
{
unsigned char status = inb(d->baseAddress + 1); //read 4701 status register (clear 4701 IRQ flag)
if(status & 0x04) //bit 2 means mailbox interrupt (controller sending status byte to PC)
{
outb(0x06, d->baseAddress + 1); //write 6 to N+1 (set 4701 pointer register to point to other port's mailbox)
statusByte = inb(d->baseAddress + 1); //read status byte (4701 other port's mailbox)
goto DPC;
}
else //controller probably set MR bit (bit 7) of 4701 (by hard resetting controller)
{
outb(0x02, d->baseAddress + 1); //set 4701 pointer register to point to the interrupt mask register (register 2)
outb(0x04, d->baseAddress + 1); //interrupt when the controller writes to its mailbox (don't interrupt on 6 full, 5 empty, 4 almost full, 3 almost empty, 1 byte detect, nor 0 parity/frame error
//below is necessary so 18x2 doesn't keep interrupting
outb(0x06, d->baseAddress + 1); //set 4701 pointer register to point to the other port's mailbox
inb(d->baseAddress + 1); //read other port's mailbox (clears any pending mailbox interrupt)
}
return IRQ_HANDLED; //Tell WDF, and hence Windows, that there WAS an interrupt outstanding for us to process
}
}
else //18x6
{
if(0x60 == (inb(d->baseAddress + 4) & 0x60)) //if the Galil controller generated an interrupt and interrupts were enabled on the controller
{
//.........这里部分代码省略.........
开发者ID:MedicalRobotics，项目名称:wylin_code，代码行数:101，代码来源:galilpci.c
示例14: pic_eoi
//-----------------------------------------------------------------------------
void pic_eoi(void)
{
outb(PIC1_CMD, PIC_EOI);
outb(PIC2_CMD, PIC_EOI);
}
开发者ID:drewt，项目名称:Telos，代码行数:6，代码来源:pic.c
示例15: sp5100_tco_ioctl
//.........这里部分代码省略.........
{ 0, }, /* End of list */
};
MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
/*
* Init & exit routines
*/
static unsigned char __devinit sp5100_tco_setupdevice(void)
{
struct pci_dev *dev = NULL;
u32 val;
/* Match the PCI device */
for_each_pci_dev(dev) {
if (pci_match_id(sp5100_tco_pci_tbl, dev) != NULL) {
sp5100_tco_pci = dev;
break;
}
}
if (!sp5100_tco_pci)
return 0;
/* Request the IO ports used by this driver */
pm_iobase = SP5100_IO_PM_INDEX_REG;
if (!request_region(pm_iobase, SP5100_PM_IOPORTS_SIZE, "SP5100 TCO")) {
printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
pm_iobase);
goto exit;
}
/* Find the watchdog base address. */
outb(SP5100_PM_WATCHDOG_BASE3, SP5100_IO_PM_INDEX_REG);
val = inb(SP5100_IO_PM_DATA_REG);
outb(SP5100_PM_WATCHDOG_BASE2, SP5100_IO_PM_INDEX_REG);
val = val << 8 | inb(SP5100_IO_PM_DATA_REG);
outb(SP5100_PM_WATCHDOG_BASE1, SP5100_IO_PM_INDEX_REG);
val = val << 8 | inb(SP5100_IO_PM_DATA_REG);
outb(SP5100_PM_WATCHDOG_BASE0, SP5100_IO_PM_INDEX_REG);
/* Low three bits of BASE0 are reserved. */
val = val << 8 | (inb(SP5100_IO_PM_DATA_REG) & 0xf8);
if (!request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE,
"SP5100 TCO")) {
printk(KERN_ERR PFX "mmio address 0x%04x already in use\n",
val);
goto unreg_region;
}
tcobase_phys = val;
tcobase = ioremap(val, SP5100_WDT_MEM_MAP_SIZE);
if (tcobase == 0) {
printk(KERN_ERR PFX "failed to get tcobase address\n");
goto unreg_mem_region;
}
/* Enable watchdog decode bit */
pci_read_config_dword(sp5100_tco_pci,
SP5100_PCI_WATCHDOG_MISC_REG,
&val);
val |= SP5100_PCI_WATCHDOG_DECODE_EN;
pci_write_config_dword(sp5100_tco_pci,
SP5100_PCI_WATCHDOG_MISC_REG,
开发者ID:119-org，项目名称:hi3518-osdrv，代码行数:67，代码来源:sp5100_tco.c
示例16: intr_init
/*===========================================================================*
* intr_init *
*===========================================================================*/
PUBLIC int intr_init(const int mine, const int auto_eoi)
{
/* Initialize the 8259s, finishing with all interrupts disabled. This is
* only done in protected mode, in real mode we don't touch the 8259s, but
* use the BIOS locations instead. The flag "mine" is set if the 8259s are
* to be programmed for MINIX, or to be reset to what the BIOS expects.
*/
/* The AT and newer PS/2 have two interrupt controllers, one master,
* one slaved at IRQ 2. (We don't have to deal with the PC that
* has just one controller, because it must run in real mode.)
*/
outb( INT_CTL, machine.ps_mca ? ICW1_PS : ICW1_AT);
outb( INT_CTLMASK, mine == INTS_MINIX ? IRQ0_VECTOR : BIOS_IRQ0_VEC);
/* ICW2 for master */
outb( INT_CTLMASK, (1 << CASCADE_IRQ));
/* ICW3 tells slaves */
if (auto_eoi)
outb( INT_CTLMASK, ICW4_AT_AEOI_MASTER);
else
outb( INT_CTLMASK, ICW4_AT_MASTER);
outb( INT_CTLMASK, ~(1 << CASCADE_IRQ)); /* IRQ 0-7 mask */
outb( INT2_CTL, machine.ps_mca ? ICW1_PS : ICW1_AT);
outb( INT2_CTLMASK, mine == INTS_MINIX ? IRQ8_VECTOR : BIOS_IRQ8_VEC);
/* ICW2 for slave */
outb( INT2_CTLMASK, CASCADE_IRQ); /* ICW3 is slave nr */
if (auto_eoi)
outb( INT2_CTLMASK, ICW4_AT_AEOI_SLAVE);
else
outb( INT2_CTLMASK, ICW4_AT_SLAVE);
outb( INT2_CTLMASK, ~0); /* IRQ 8-15 mask */
/* Copy the BIOS vectors from the BIOS to the Minix location, so we
* can still make BIOS calls without reprogramming the i8259s.
*/
#if IRQ0_VECTOR != BIOS_IRQ0_VEC
phys_copy(BIOS_VECTOR(0) * 4L, VECTOR(0) * 4L, 8 * 4L);
#endif
#if IRQ8_VECTOR != BIOS_IRQ8_VEC
phys_copy(BIOS_VECTOR(8) * 4L, VECTOR(8) * 4L, 8 * 4L);
#endif
return OK;
}
开发者ID:biswajit1983，项目名称:minix-nbsd，代码行数:47，代码来源:i8259.c
示例17: xoutb
static inline void xoutb(unsigned char val, unsigned short port)
{
pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
outb(val, port);
}
开发者ID:andi34，项目名称:Dhollmen_Kernel，代码行数:5，代码来源:cm4040_cs.c
示例18: i8259_disable
/* Disable 8259 - write 0xFF in OCW1 master and slave. */
PUBLIC void i8259_disable(void)
{
outb(INT2_CTLMASK, 0xFF);
outb(INT_CTLMASK, 0xFF);
inb(INT_CTLMASK);
}
开发者ID:biswajit1983，项目名称:minix-nbsd，代码行数:7，代码来源:i8259.c
示例19: fdc_init_dma_read
static void fdc_init_dma_read()
{
outb(0x0a, 0x06);
outb(0x0b, 0x56);
outb(0x0a, 0x02);
}
开发者ID:JustBeYou，项目名称:PhotonOS，代码行数:6，代码来源:fdc.c
示例20: cgaregw
static void
cgaregw(int index, int data)
{
outb(0x3D4, index);
outb(0x3D4+1, data);
}
开发者ID:CoryXie，项目名称:NxM，代码行数:6，代码来源:cga.c
注：本文中的outb函数示例由纯净天空整理自Github/MSDocs等源码及文档管理平台，相关代码片段筛选自各路编程大神贡献的开源项目，源码版权归原作者所有，传播和使用请参考对应项目的License；未经允许，请勿转载。 |
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