static int do_bootm_linux(struct image_data *idata)
{
	int (*appl)(char *cmdline);
	const char *cmdline = linux_bootargs_get();
	char *cmdlinedest = (char *) CMD_LINE_ADDR;
	int ret;

	ret = bootm_load_os(idata, idata->os_address);
	if (ret)
		return ret;

	appl = (void *)(idata->os_address + idata->os_entry);
	printf("Starting Kernel at 0x%p\n", appl);

	if (idata->dryrun)
		return 0;

	icache_disable();

	strncpy(cmdlinedest, cmdline, 0x1000);
	cmdlinedest[0xfff] = 0;

	*(volatile unsigned long *) IMASK = 0x1f;

	(*appl)(cmdlinedest);

	return -1;
}

int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	switch (argc) {
	case 2:			/* on / off	*/
		switch (on_off(argv[1])) {
#if 0	/* prevented by varargs handling; FALLTROUGH is harmless, too */
		default: printf ("Usage:\n%s\n", cmdtp->usage);
			return;
#endif
		case 0:	icache_disable();
			break;
		case 1:	icache_enable ();
			break;
		}
		/* FALL TROUGH */
	case 1:			/* get status */
		printf ("Instruction Cache is %s\n",
			icache_status() ? "ON" : "OFF");
		return 0;
	default:
		printf ("Usage:\n%s\n", cmdtp->usage);
		return 1;
	}
	return 0;
}

int cleanup_before_linux (void)
{
	/*
	 * this function is called just before we call linux
	 * it prepares the processor for linux
	 *
	 * we turn off caches etc ...
	 */

	disable_interrupts ();

	/*
	 * this function is called just before we call linux
	 * it prepares the processor for linux
	 */
#ifdef CONFIG_BOARD_CLEANUP_BEFORE_LINUX
	board_cleanup_before_linux();
#endif

	/* turn off I/D-cache */
	icache_disable();
	dcache_disable();
	/* flush I/D-cache */
	cache_flush();

	return 0;
}

int cleanup_before_linux(void)
{
	unsigned int i;

	/*
	 * this function is called just before we call linux
	 * it prepares the processor for linux
	 *
	 * we turn off caches etc ...
	 */
	disable_interrupts();

	/* turn off I/D-cache */
	icache_disable();
	dcache_disable();

	/* invalidate I-cache */
	cache_flush();

#ifndef CONFIG_L2_OFF
	/* turn off L2 cache */
	l2_cache_disable();
	/* invalidate L2 cache also */
	v7_flush_dcache_all(get_device_type());
#endif
	i = 0;
	/* mem barrier to sync up things */
	asm("mcr p15, 0, %0, c7, c10, 4": :"r"(i));

#ifndef CONFIG_L2_OFF
	l2_cache_enable();
#endif

	return 0;
}

/*
************************************************************************************************************
*
*                                             function
*
*    name          :
*
*    parmeters     :
*
*    return        :
*
*    note          :
*
*
************************************************************************************************************
*/
void sunxi_flush_allcaches(void)
{
	icache_disable();

	flush_dcache_all();
	dcache_disable();
}

int
/**********************************************************/
board_init (void)
/**********************************************************/
{
	/* We have RAM, disable cache */
	dcache_disable();
	icache_disable();

	led_code (0xf, YELLOW);

	/* arch number of HHP Cradle */
	gd->bd->bi_arch_number = MACH_TYPE_HHP_CRADLE;

	/* adress of boot parameters */
	gd->bd->bi_boot_params = 0xa0000100;

	/* Init SIOs to enable SCC2 */
	udelay (100000);		/* delay makes it look neat */
	init_sio (0, CRADLE_SIO1_PHYS);
	udelay (100000);
	init_sio (1, CRADLE_SIO2_PHYS);
	udelay (100000);
	init_sio (2, CRADLE_SIO3_PHYS);
	udelay (100000);
	set_led (3, GREEN);

	return 1;
}

int cleanup_before_linux (void)
{
	/*
	 * this function is called just before we call linux
	 * it prepares the processor for linux
	 *
	 * we turn off caches etc ...
	 * and we set the CPU-speed to 73 MHz - see start.S for details
	 */

#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
	disable_interrupts ();

	/* turn off I-cache */
	icache_disable();
	dcache_disable();

	/* flush I-cache */
	cache_flush();
#ifdef CONFIG_ARM7_REVD
	/* go to high speed */
	IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73;
#endif
#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
	disable_interrupts ();
	/* Nothing more needed */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
	/* No cleanup before linux for IntegratorAP/CM720T as yet */
#else
#error No cleanup_before_linux() defined for this CPU type
#endif
	return 0;
}

static bool_t mach_cleanup(void)
{
    /* stop timer 0 ~ 4 */
    writel(S5PV210_TCON, 0x0);

    /* stop system timer */
    writel(S5PV210_SYSTIMER_TCON, 0x0);

    /* disable irq */
    irq_disable();

    /* disable fiq */
    fiq_disable();

    /* disable icache */
    icache_disable();

    /* disable dcache */
    dcache_disable();

    /* disable mmu */
    mmu_disable();

    /* disable vic */
    vic_disable();

    return TRUE;
}

int spr_post_test (int flags)
{
	int ret = 0;
	int ic = icache_status ();
	int i;

	unsigned long code[] = {
		0x7c6002a6,				/* mfspr r3,SPR */
		0x4e800020				/* blr          */
	};
	unsigned long (*get_spr) (void) = (void *) code;

	if (ic)
		icache_disable ();

	for (i = 0; i < spr_test_list_size; i++) {
		int num = spr_test_list[i].number;

		/* mfspr r3,num */
		code[0] = 0x7c6002a6 | ((num & 0x1F) << 16) | ((num & 0x3E0) << 6);

		if ((get_spr () & spr_test_list[i].mask) !=
			(spr_test_list[i].value & spr_test_list[i].mask)) {
			post_log ("The value of %s special register "
				  "is incorrect: 0x%08X\n",
					spr_test_list[i].name, get_spr ());
			ret = -1;
		}
	}

	if (ic)
		icache_enable ();

	return ret;
}

int do_bootldr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	void *addr;
	uint32_t *data;

	/* Get the address */
	if (argc < 2)
		addr = (void *)load_addr;
	else
		addr = (void *)simple_strtoul(argv[1], NULL, 16);

	/* Check if it is a LDR file */
	data = addr;
#if defined(__ADSPBF54x__) || defined(__ADSPBF52x__)
	if ((*data & 0xFF000000) == 0xAD000000 && data[2] == 0x00000000) {
#else
	if (*data == 0xFF800060 || *data == 0xFF800040 || *data == 0xFF800020) {
#endif
		/* We want to boot from FLASH or SDRAM */
		printf("## Booting ldr image at 0x%p ...\n", addr);

		icache_disable();
		dcache_disable();

		__asm__(
			"jump (%1);"
			:
			: "q7" (addr), "a" (_BOOTROM_MEMBOOT));
	} else

int cleanup_before_linux (void)
{
    /*
     * this function is called just before we call linux
     * it prepares the processor for linux
     *
     * we turn off caches etc ...
     */

    disable_interrupts ();

#ifdef CONFIG_LCD
    {
        extern void lcd_disable(void);
        extern void lcd_panel_disable(void);

        lcd_disable(); /* proper disable of lcd & panel */
        lcd_panel_disable();
    }
#endif

    /* turn off I/D-cache */
    icache_disable();
    dcache_disable();
    /* flush I/D-cache */
    cache_flush();
    /*Workaround to enable L2CC during kernel decompressing*/
#ifdef fixup_before_linux
    fixup_before_linux;
#endif
    return 0;
}

int cleanup_before_linux(void)
{
	/*
	 * this function is called just before we call linux
	 * it prepares the processor for linux
	 *
	 * disable interrupt and turn off caches etc ...
	 */
	disable_interrupts();

	/*
	 * Turn off I-cache and invalidate it
	 */
	icache_disable();
	invalidate_icache_all();

	/*
	 * turn off D-cache
	 * dcache_disable() in turn flushes the d-cache and disables MMU
	 */
	dcache_disable();
	invalidate_dcache_all();

	return 0;
}

int cleanup_before_linux(void)
{
	unsigned int i;

	/*
	 * this function is called just before we call linux
	 * it prepares the processor for linux
	 *
	 * we turn off caches etc ...
	 */	 
	 
	disable_interrupts();
#ifndef CONFIG_ICACHE_OFF
	/* turn off I/D-cache */
	icache_disable();
	icache_invalid();
	asm("isb");	
#endif
	
#ifndef CONFIG_DCACHE_OFF
	dcache_disable();
	asm("dsb");
#endif
		
//#ifndef CONFIG_ICAHCE_OFF
//	/* invalidate I-cache */
//	cache_flush();
//#else
//#ifndef CONFIG_DCACHE_OFF
//	cache_flush();
//#endif
//#endif

//#ifndef CONFIG_L2_OFF
//	/* turn off L2 cache */
//	l2_cache_disable();
//	/* invalidate L2 cache also */
//	invalidate_l2_cache();
//#endif
#ifndef CONFIG_L2_OFF
	l2_cache_disable();
	l2x0_clean_inv_all();
#endif
	
	i = 0;
	/* mem barrier to sync up things */
	asm("mcr p15, 0, %0, c7, c10, 4": :"r"(i));
	
/*#ifndef CONFIG_L2_OFF
	l2_cache_enable();
#endif
*/
	asm("dsb");
	asm("isb");	
	return 0;
}

void kgdb_flush_cache_all(void)
{
	if (dcache_status()) {
		dcache_disable();
		dcache_enable();
	}
	if (icache_status()) {
		icache_disable();
		icache_enable();
	}
}

int board_init (void)
{
    /* We have RAM, disable cache */
    dcache_disable();
    icache_disable();

    gd->bd->bi_arch_number = MACH_TYPE_INNOKOM;
    gd->bd->bi_boot_params = 0xa0000100;
    gd->bd->bi_baudrate = CONFIG_BAUDRATE;

    return 0;
}

int cleanup_before_linux(void)
{
	/*
	 * this function is called just before we call linux
	 * it prepares the processor for linux
	 *
	 * we turn off caches etc ...
	 */
#ifndef CONFIG_SPL_BUILD
	disable_interrupts();
#ifdef CONFIG_LCD
	{
		/* switch off LCD panel */
		lcd_panel_disable();
		/* disable LCD controller */
		lcd_disable();
	}
#endif /* CONFIG_LCD */
#endif /* CONFIG_SPL_BUILD */

	/*
	 * Turn off I-cache and invalidate it
	 */
	icache_disable();
	invalidate_icache_all();

	/*
	 * turn off D-cache
	 * dcache_disable() in turn flushes the d-cache and disables MMU
	 */
	dcache_disable();
	v7_outer_cache_disable();

	/*
	 * After D-cache is flushed and before it is disabled there may
	 * be some new valid entries brought into the cache. We are sure
	 * that these lines are not dirty and will not affect our execution.
	 * (because unwinding the call-stack and setting a bit in CP15 SCTRL
	 * is all we did during this. We have not pushed anything on to the
	 * stack. Neither have we affected any static data)
	 * So just invalidate the entire d-cache again to avoid coherency
	 * problems for kernel
	 */
	invalidate_dcache_all();

	/*
	 * Some CPU need more cache attention before starting the kernel.
	 */
	cpu_cache_initialization();

	return 0;
}

/*
 * do_reset()
 *
 * Shell command to reset the board.
 */
void do_reset( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
{
	printf( "Resetting...\n" );

	/* Disabe and invalidate cache */
	icache_disable();
	dcache_disable();

	/* Jump to warm start (in RAM) */
	_start_warm();

	/* Should never get here */
	while(1);
}

int cleanup_before_linux(void)
{
	unsigned int i;

#ifdef CONFIG_CMD_IMX_DOWNLOAD_MODE
	extern void clear_mfgmode_mem(void);

	clear_mfgmode_mem();
#endif

#ifdef CONFIG_VIDEO_MX5
	ipu_disable_channel(MEM_BG_SYNC);
	ipu_uninit_channel(MEM_BG_SYNC);
#endif

	/*
	 * this function is called just before we call linux
	 * it prepares the processor for linux
	 *
	 * we turn off caches etc ...
	 */
	disable_interrupts();

	/* flush cache */
	cache_flush();

	/* turn off I/D-cache */
	icache_disable();
	/* invalidate D-cache */
	dcache_disable();

#ifndef CONFIG_L2_OFF
	/* turn off L2 cache */
	l2_cache_disable();
	/* invalidate L2 cache also */
	v7_flush_dcache_all(get_device_type());
#endif
	i = 0;
	/* mem barrier to sync up things */
	asm("mcr p15, 0, %0, c7, c10, 4": :"r"(i));

	/* turn off MMU */
	MMU_OFF();

#ifndef CONFIG_L2_OFF
	l2_cache_enable();
#endif

	return 0;
}

/*
 * Miscelaneous platform dependent initialisations
 */
int board_init(void)
{
	/* We have RAM, disable cache */
	dcache_disable();
	icache_disable();

	/* memory and cpu-speed are setup before relocation */
	/* so we do _nothing_ here */

	/* adress of boot parameters */
	gd->bd->bi_boot_params = 0xa0000100;

	return 0;
}

int board_init (void)
{
	/* We have RAM, disable cache */
	dcache_disable();
	icache_disable();

	/* arch number of Lubbock-Board */
	gd->bd->bi_arch_number = MACH_TYPE_LUBBOCK;

	/* adress of boot parameters */
	gd->bd->bi_boot_params = 0xa0000100;

	return 0;
}