int askregvar(Symbol p, Symbol regs) {
	Symbol r;

	assert(p);
	if (p->sclass != REGISTER)
		return 0;
	else if (!isscalar(p->type)) {
		p->sclass = AUTO;
		return 0;
	}
	else if (p->temporary) {
		p->x.name = "?";
		return 1;
	}
	else if ((r = askreg(regs, vmask)) != NULL) {
		p->x.regnode = r->x.regnode;
		p->x.regnode->vbl = p;
		p->x.name = r->x.name;
		debug(dumpregs("(allocating %s to symbol %s)\n", p->x.name, p->name));
		return 1;
	}
	else {
		p->sclass = AUTO;
		return 0;
	}
}

/* ------------------------------------------------------------------------*//**
 * @FUNCTION		core44xx_main
 * @BRIEF		PRCM CORE menu
 * @RETURNS		0 in case of success
 *			OMAPCONF_ERR_ARG
 *			OMAPCONF_ERR_CPU
 *			OMAPCONF_ERR_INTERNAL
 * @param[in]		argc: shell input argument number
 * @param[in]		argv: shell input argument(s)
 * @DESCRIPTION		PRCM CORE menu
 *//*------------------------------------------------------------------------ */
int core44xx_main(int argc, char *argv[])
{
	int ret;

	CHECK_CPU(44xx, OMAPCONF_ERR_CPU);

	if (argc == 2) {
		if (!init_done)
			core44xx_regtable_init();
		if (strcmp(argv[1], "dump") == 0) {
			ret = dumpregs(prcm_core_reg_table);
		} else if (strcmp(argv[1], "cfg") == 0) {
			ret = core44xx_config_show(stdout);
		} else if (strcmp(argv[1], "dep") == 0) {
			ret = core44xx_dependency_show(stdout);
		} else {
			help(HELP_PRCM);
			ret = OMAPCONF_ERR_ARG;
		}
	} else {
		help(HELP_PRCM);
		ret = OMAPCONF_ERR_ARG;
	}

	return ret;
}

// lastcontinuehandler is reached, because runtime cannot handle
// current exception. lastcontinuehandler will print crash info and exit.
uint32
runtime·lastcontinuehandler(ExceptionRecord *info, Context *r, G *gp)
{
	bool crash;

	if(runtime·panicking)	// traceback already printed
		runtime·exit(2);
	runtime·panicking = 1;

	runtime·printf("Exception %x %p %p %p\n", info->ExceptionCode,
		(uintptr)info->ExceptionInformation[0], (uintptr)info->ExceptionInformation[1], (uintptr)r->Eip);

	runtime·printf("PC=%x\n", r->Eip);
	if(g->m->lockedg != nil && g->m->ncgo > 0 && gp == g->m->g0) {
		runtime·printf("signal arrived during cgo execution\n");
		gp = g->m->lockedg;
	}
	runtime·printf("\n");

	if(runtime·gotraceback(&crash)){
		runtime·traceback(r->Eip, r->Esp, 0, gp);
		runtime·tracebackothers(gp);
		runtime·dumpregs(r);
	}
	
	if(crash)
		runtime·crash();

	runtime·exit(2);
	return 0; // not reached
}

static void
profintr(Ureg *ur, void*)
{
	OstmrReg *ost = OSTMRREG;
	int t;

	if((ost->osmr[3] - ost->oscr) < 2*CLOCKFREQ) {
		/* less than 2 seconds before reset, say something */
		setpanic();
		clockpoll();
		dumpregs(ur);
		panic("Watchdog timer will expire");
	}

	/* advance the profile clock tick */
	ost->osmr[2] += timer_incr[2];
	ost->ossr = (1 << 2); 			/* Clear the SR */
	t = 1;
	while((ost->osmr[2] - ost->oscr) > 0x80000000) {
		ost->osmr[2] += timer_incr[2];
		t++;
	}
	if(prof_fcn)
		prof_fcn(ur, t);
}

uint32
runtime·sighandler(ExceptionRecord *info, Context *r, G *gp)
{
	uintptr *sp;

	switch(info->ExceptionCode) {
	case EXCEPTION_BREAKPOINT:
		r->Eip--;	// because 8l generates 2 bytes for INT3
		return 1;
	}

	if(gp != nil && runtime·issigpanic(info->ExceptionCode)) {
		// Make it look like a call to the signal func.
		// Have to pass arguments out of band since
		// augmenting the stack frame would break
		// the unwinding code.
		gp->sig = info->ExceptionCode;
		gp->sigcode0 = info->ExceptionInformation[0];
		gp->sigcode1 = info->ExceptionInformation[1];
		gp->sigpc = r->Eip;

		// Only push runtime·sigpanic if r->eip != 0.
		// If r->eip == 0, probably panicked because of a
		// call to a nil func.  Not pushing that onto sp will
		// make the trace look like a call to runtime·sigpanic instead.
		// (Otherwise the trace will end at runtime·sigpanic and we
		// won't get to see who faulted.)
		if(r->Eip != 0) {
			sp = (uintptr*)r->Esp;
			*--sp = r->Eip;
			r->Esp = (uintptr)sp;
		}
		r->Eip = (uintptr)runtime·sigpanic;
		return 0;
	}

	if(runtime·panicking)	// traceback already printed
		runtime·exit(2);
	runtime·panicking = 1;

	runtime·printf("Exception %x %p %p\n", info->ExceptionCode,
		info->ExceptionInformation[0], info->ExceptionInformation[1]);

	runtime·printf("PC=%x\n", r->Eip);
	if(m->lockedg != nil && m->ncgo > 0 && gp == m->g0) {
		runtime·printf("signal arrived during cgo execution\n");
		gp = m->lockedg;
	}
	runtime·printf("\n");

	if(runtime·gotraceback()){
		runtime·traceback((void*)r->Eip, (void*)r->Esp, 0, gp);
		runtime·tracebackothers(gp);
		runtime·dumpregs(r);
	}

	runtime·exit(2);
	return 0;
}

/* ------------------------------------------------------------------------*//**
 * @FUNCTION		core44xx_dump
 * @BRIEF		dump PRCM CORE registers
 * @RETURNS		0 in case of success
 *			OMAPCONF_ERR_REG_ACCESS
 *			OMAPCONF_ERR_CPU
 * @DESCRIPTION		dump PRCM CORE registers
 *//*------------------------------------------------------------------------ */
int core44xx_dump(void)
{
	CHECK_CPU(44xx, OMAPCONF_ERR_CPU);

	if (!init_done)
		core44xx_regtable_init();

	return dumpregs(prcm_core_reg_table);
}

/* ------------------------------------------------------------------------*//**
 * @FUNCTION		wkup44xx_dump
 * @BRIEF		dump PRCM WKUP registers
 * @RETURNS		0 in case of success
 *			OMAPCONF_ERR_REG_ACCESS
 *			OMAPCONF_ERR_CPU
 * @DESCRIPTION		dump PRCM WKUP registers
 *//*------------------------------------------------------------------------ */
int wkup44xx_dump(void)
{
	CHECK_CPU(44xx, OMAPCONF_ERR_ARG);

	if (!init_done)
		wkup44xx_regtable_init();

	return dumpregs(prcm_wkup_reg_table);
}

static void
faultarm(Ureg *ureg)
{
	char buf[ERRMAX];

	sprint(buf, "sys: trap: fault pc=%8.8lux", (ulong)ureg->pc);
	if(0){
		iprint("%s\n", buf);
		dumpregs(ureg);
	}
	disfault(ureg, buf);
}

static void ralloc(Node p) {
	int i;
	unsigned mask[2];

	mask[0] = tmask[0];
	mask[1] = tmask[1];
	assert(p);
	debug(fprint(stderr, "(rallocing %x)\n", p));
	for (i = 0; i < NELEMS(p->x.kids) && p->x.kids[i]; i++) {
		Node kid = p->x.kids[i];
		Symbol r = kid->syms[RX];
		assert(r && kid->x.registered);
		if (r->sclass != REGISTER && r->x.lastuse == kid)
			putreg(r);
	}
	if (!p->x.registered && NeedsReg[opindex(p->op)]
	&& (*IR->x.rmap)(opkind(p->op))) {
		Symbol sym = p->syms[RX], set = sym;
		assert(sym);
		if (sym->temporary)
			set = (*IR->x.rmap)(opkind(p->op));
		assert(set);
		if (set->sclass != REGISTER) {
			Symbol r;
			if (*IR->x._templates[getrule(p, p->x.inst)] == '?')
				for (i = 1; i < NELEMS(p->x.kids) && p->x.kids[i]; i++) {
					Symbol r = p->x.kids[i]->syms[RX];
					assert(p->x.kids[i]->x.registered);
					assert(r && r->x.regnode);
					assert(sym->x.wildcard || sym != r);
					mask[r->x.regnode->set] &= ~r->x.regnode->mask;
				}
			r = getreg(set, mask, p);
			if (sym->temporary) {
				Node q;
				r->x.lastuse = sym->x.lastuse;
				for (q = sym->x.lastuse; q; q = q->x.prevuse) {
					q->syms[RX] = r;
					q->x.registered = 1;
					if (sym->u.t.cse && q->x.copy)
						q->x.equatable = 1;
				}
			} else {
				p->syms[RX] = r;
				r->x.lastuse = p;
			}
			debug(dumpregs("(allocating %s to node %x)\n", r->x.name, (char *) p));
		}
	}
	p->x.registered = 1;
	(*IR->x.clobber)(p);
}

void fatal(const char *format, ...)
{
    va_list ap;
    va_start(ap, format);
    vprintf(format, ap);
    va_end(ap);
    closeide();
    fflush(stdout);
    dumppic();
    dumpregs();
    fflush(stdout);
    exit(-1);
}

int main(int argc, char **argv)
{
	if (argc < 2) { fprintf(stderr, "Need spi device\n"); return 1; }

	int fd = open(argv[1], O_RDWR);
	if (fd < 0) { perror("open"); return 1;	}

	dumpstat(argv[1], fd);

	dumpregs(fd);

	close(fd);
}

/* ------------------------------------------------------------------------*//**
 * @FUNCTION		stm_dump_regs
 * @BRIEF		dump STM registers
 * @RETURNS		0 in case of success
 *			OMAPCONF_ERR_NOT_AVAILABLE
 * @DESCRIPTION		dump STM registers
 *//*------------------------------------------------------------------------ */
int stm_dump_regs(void)
{
	if (!emu44xx_is_enabled()) {
		printf("stm_dump_regs(): "
			"trying to enable ETB but EMU domain OFF!!!\n");
		return OMAPCONF_ERR_NOT_AVAILABLE;
	}

	if (!stm_is_claimed()) {
		printf("stm_dump_regs(): STM not claimed!\n");
		return OMAPCONF_ERR_INTERNAL;
	}

	return dumpregs((reg_table *) omap4_stm_reg_table);
}

void closepc()
{
    atapi->exit();
//        ioctl_close();
    dumppic();
//        output=7;
//        setpitclock(clocks[0][0][0]);
//        while (1) runpc();
    savedisc(0);
    savedisc(1);
    dumpregs();
    closevideo();
    device_close_all();
    midi_close();
}

static void
faultarm(Ureg *ureg, ulong fsr, uintptr addr)
{
	int user, insyscall, read;
	static char buf[ERRMAX];
	char *err;

	read = (fsr & (1<<11)) == 0;
	user = userureg(ureg);
	if(!user){
		if(addr >= USTKTOP || up == nil)
			_dumpstack(ureg);
		if(addr >= USTKTOP)
			panic("kernel fault: bad address pc=%#.8lux addr=%#.8lux fsr=%#.8lux", ureg->pc, addr, fsr);
		if(up == nil)
			panic("kernel fault: no user process pc=%#.8lux addr=%#.8lux fsr=%#.8lux", ureg->pc, addr, fsr);
	}
	if(up == nil)
		panic("user fault: up=nil pc=%#.8lux addr=%#.8lux fsr=%#.8lux", ureg->pc, addr, fsr);

	insyscall = up->insyscall;
	up->insyscall = 1;
	switch(fsr & 0x1F){
	case 0x05:	/* translation fault L1 */
	case 0x07:	/* translation fault L2 */
	case 0x03:	/* access flag fault L1 */
	case 0x06:	/* access flag fault L2 */
	case 0x09:	/* domain fault L1 */
	case 0x0B:	/* domain fault L2 */
	case 0x0D:	/* permission fault L1 */
	case 0x0F:	/* permission fault L2 */
		if(fault(addr, read) == 0)
			break;
		/* wet floor */
	default:
		err = faulterr[fsr & 0x1F];
		if(err == nil)
			err = "fault";
		if(!user){
			dumpregs(ureg);
			_dumpstack(ureg);
			panic("kernel %s: pc=%#.8lux addr=%#.8lux fsr=%#.8lux", err, ureg->pc, addr, fsr);
		}
		sprint(buf, "sys: trap: %s %s addr=%#.8lux", err, read ? "read" : "write", addr);
		postnote(up, 1, buf, NDebug);
	}
	up->insyscall = insyscall;
}

/* ------------------------------------------------------------------------*//**
 * @FUNCTION		sr44xx_dump
 * @BRIEF		dump SR PRCM registers
 * @RETURNS		0 in case of success
 *			OMAPCONF_ERR_CPU
 *			OMAPCONF_ERR_REG_ACCESS
 * @DESCRIPTION		dump SR PRCM registers
 *//*------------------------------------------------------------------------ */
int sr44xx_dump(void)
{
	unsigned int ret;

	if (!cpu_is_omap44xx())
		return OMAPCONF_ERR_CPU;

	if (!init_done)
		sr44xx_regtable_init();

	if (mod44xx_is_accessible(OMAP4_SMARTREFLEX_MPU) != 1) {
		printf("SR_MPU not accessible.\n");
	} else {
		ret = dumpregs(prcm_sr_mpu_reg_table);
		if (ret != 0)
			return ret;
		ret = dumpregs(prcm_sr_vp_mpu_reg_table);
		if (ret != 0)
			return ret;
	}

	if (mod44xx_is_accessible(OMAP4_SMARTREFLEX_IVA) != 1) {
		printf("SR_IVA not accessible.\n");
	} else {
		ret = dumpregs(prcm_sr_iva_reg_table);
		if (ret != 0)
			return ret;
		ret = dumpregs(prcm_sr_vp_iva_reg_table);
		if (ret != 0)
			return ret;
	}

	if (mod44xx_is_accessible(OMAP4_SMARTREFLEX_CORE) != 1) {
		printf("SR_CORE not accessible.\n");
	} else {
		ret = dumpregs(prcm_sr_core_reg_table);
		if (ret != 0)
			return ret;
		ret = dumpregs(prcm_sr_vp_core_reg_table);
		if (ret != 0)
			return ret;
	}

	return dumpregs(prcm_sr_vc_reg_table);
}

/* ------------------------------------------------------------------------*//**
 * @FUNCTION		stm_atb_capture_enable
 * @BRIEF		enable STM trace to be captured in ETB via ATB
 * @RETURNS		0 in case of success
 *			OMAPCONF_ERR_NOT_AVAILABLE
 * @DESCRIPTION		enable STM trace to be captured in ETB via ATB
 *			NB: make sure EMU domain is ON before calling this
 *			function.
 *//*------------------------------------------------------------------------ */
int stm_atb_capture_enable(void)
{
	if (!emu44xx_is_enabled()) {
		printf("stm_atb_capture_enable(): "
			"trying to enable ETB but EMU domain OFF!!!\n");
		return OMAPCONF_ERR_NOT_AVAILABLE;
	}
	if (!stm_is_claimed()) {
		printf("stm_atb_capture_enable(): STM not claimed!\n");
		return OMAPCONF_ERR_INTERNAL;
	}

	mem_write(OMAP4430_ATB_CONFIG, 0x00010000);

	#ifdef STM_OMAP4_DEBUG
	printf("stm_atb_capture_enable(): ATB capture enabled.\n");
	dumpregs((reg_table *) omap4_stm_reg_table);
	#endif

	return 0;
}

void
sighandler(int32 sig, Siginfo *info, void *context)
{
	Ucontext *uc;
	Mcontext *mc;
	Regs *r;

	if(sigtab[sig].flags & SigQueue) {
		if(sigsend(sig) || (sigtab[sig].flags & SigIgnore))
			return;
		exit(2);	// SIGINT, SIGTERM, etc
	}

	if(panicking)	// traceback already printed
		exit(2);
	panicking = 1;

	if(sig < 0 || sig >= NSIG){
		printf("Signal %d\n", sig);
	}else{
		printf("%s\n", sigtab[sig].name);
	}

	uc = context;
	mc = uc->uc_mcontext;
	r = &mc->ss;

	printf("Faulting address: %p\n", info->si_addr);
	printf("pc: %X\n", r->rip);
	printf("\n");

	if(gotraceback()){
		traceback((void*)r->rip, (void*)r->rsp, (void*)r->r15);
		tracebackothers((void*)r->r15);
		dumpregs(r);
	}

	breakpoint();
	exit(2);
}

static void
dumpregs_v8p(const prgregset_t reg, const prxregset_t *xreg, int is64)
{
	static const uint32_t zero[8] = { 0 };
	int gr, xr, cols = 2;
	uint64_t xval;

	if (memcmp(xreg->pr_un.pr_v8p.pr_xg, zero, sizeof (zero)) == 0 &&
	    memcmp(xreg->pr_un.pr_v8p.pr_xo, zero, sizeof (zero)) == 0) {
		dumpregs(reg, is64);
		return;
	}

	for (gr = R_G0, xr = XR_G0; gr <= R_G7; gr++, xr++) {
		xval = (uint64_t)xreg->pr_un.pr_v8p.pr_xg[xr] << 32 |
		    (uint64_t)(uint32_t)reg[gr];
		(void) printf("  %s = 0x%.16" PRIX64, regname[gr], xval);
		if ((gr + 1) % cols == 0)
			(void) putchar('\n');
	}

	for (gr = R_O0, xr = XR_O0; gr <= R_O7; gr++, xr++) {
		xval = (uint64_t)xreg->pr_un.pr_v8p.pr_xo[xr] << 32 |
		    (uint64_t)(uint32_t)reg[gr];
		(void) printf("  %s = 0x%.16" PRIX64, regname[gr], xval);
		if ((gr + 1) % cols == 0)
			(void) putchar('\n');
	}

	for (gr = R_L0; gr < NPRGREG; gr++) {
		(void) printf("  %s =         0x%.8lX",
		    regname[gr], (long)reg[gr]);
		if ((gr + 1) % cols == 0)
			(void) putchar('\n');
	}

	if (gr % cols != 0)
		(void) putchar('\n');
}

static void
fault386(Ureg* ureg, void*)
{
	ulong addr;
	int read, user, n, insyscall;
	char buf[ERRMAX];

	addr = getcr2();
	read = !(ureg->ecode & 2);

	user = (ureg->cs & 0xFFFF) == UESEL;
	if(!user){
		if(vmapsync(addr))
			return;
		if(addr >= USTKTOP)
			panic("kernel fault: bad address pc=0x%.8lux addr=0x%.8lux", ureg->pc, addr);
		if(up == nil)
			panic("kernel fault: no user process pc=0x%.8lux addr=0x%.8lux", ureg->pc, addr);
	}
	if(up == nil)
		panic("user fault: up=0 pc=0x%.8lux addr=0x%.8lux", ureg->pc, addr);

	insyscall = up->insyscall;
	up->insyscall = 1;
	n = fault(addr, read);
	if(n < 0){
		if(!user){
			dumpregs(ureg);
			panic("fault: 0x%lux", addr);
		}
		checkpages();
		checkfault(addr, ureg->pc);
		sprint(buf, "sys: trap: fault %s addr=0x%lux",
			read ? "read" : "write", addr);
		postnote(up, 1, buf, NDebug);
	}
	up->insyscall = insyscall;
}

void
sighandler(int32 sig, Siginfo* info, void* context)
{
	Ucontext *uc;
	Mcontext *mc;

	if(sigtab[sig].flags & SigQueue) {
		if(sigsend(sig) || (sigtab[sig].flags & SigIgnore))
			return;
		exit(2);	// SIGINT, SIGTERM, etc
	}

	if(panicking)	// traceback already printed
		exit(2);
	panicking = 1;

	uc = context;
	mc = &uc->uc_mcontext;

	if(sig < 0 || sig >= NSIG)
		printf("Signal %d\n", sig);
	else
		printf("%s\n", sigtab[sig].name);

	printf("Faulting address: %p\n", info->si_addr);
	printf("PC=%X\n", mc->mc_eip);
	printf("\n");

	if(gotraceback()){
		traceback((void*)mc->mc_eip, (void*)mc->mc_esp, m->curg);
		tracebackothers(m->curg);
		dumpregs(mc);
	}

	breakpoint();
	exit(2);
}