#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>

#define PORT(base, int)							\
{									\
	.iobase		= base,						\
	.irq		= int,						\
	.uartclk	= 1843200,					\
	.iotype		= UPIO_PORT,					\
	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,		\
	.regshift	= 0,						\
}

static struct plat_serial8250_port uart8250_data[] = {
	PORT(0x3F8, 4),
	PORT(0x2F8, 3),
	PORT(0x3E8, 4),
	PORT(0x2E8, 3),
	{ },
};

static struct platform_device uart8250_device = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= uart8250_data,
	},
};

static int __init uart8250_init(void)

	asic = (csmsr & 0x08) ? asic : !asic;
	p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1");
	printk("%s.\n", boardtype);
}

#define PORT(_base,_irq)				\
	{						\
		.iobase		= _base,		\
		.irq		= _irq,			\
		.uartclk	= 1843200,		\
		.iotype		= UPIO_PORT,		\
		.flags		= UPF_BOOT_AUTOCONF,	\
	}

static struct plat_serial8250_port pcimt_data[] = {
	PORT(0x3f8, 4),
	PORT(0x2f8, 3),
	{ },
};

static struct platform_device pcimt_serial8250_device = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= pcimt_data,
	},
};

static struct resource pcimt_cmos_rsrc[] = {
        {
                .start = 0x70,

static void host_close(struct sscape_info *devc)
{
	outb((0x03), PORT(HOST_CTRL));	/* Put the board to the MIDI mode */
}

int bfin_device_ready(struct mtd_info *mtd)
{
	int ret = (*PORT(CONFIG_NAND_GPIO_PORT, IO) & BFIN_NAND_READY) ? 1 : 0;
	SSYNC();
	return ret;
}

static void _spi_deselect(void) {
	IO_WRITE(PORT(IO_SPI), IO_SPI_SS_ALL, IO_SPI_SS_ALL);
}

#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>

#define PORT(_base,_irq)				\
	{						\
		.iobase		= _base,		\
		.irq		= _irq,			\
		.uartclk	= 1843200,		\
		.iotype		= UPIO_PORT,		\
		.flags		= UPF_BOOT_AUTOCONF,	\
	}

static struct plat_serial8250_port boca_data[] = {
	PORT(0x100, 12),
	PORT(0x108, 12),
	PORT(0x110, 12),
	PORT(0x118, 12),
	PORT(0x120, 12),
	PORT(0x128, 12),
	PORT(0x130, 12),
	PORT(0x138, 12),
	PORT(0x140, 12),
	PORT(0x148, 12),
	PORT(0x150, 12),
	PORT(0x158, 12),
	PORT(0x160, 12),
	PORT(0x168, 12),
	PORT(0x170, 12),
	PORT(0x178, 12),

#define PORT(_irq)					\
	{						\
		.irq		= _irq,			\
		.regshift	= 2,			\
		.iotype		= UPIO_MEM32,		\
		.flags		= (UPF_SKIP_TEST |	\
			 UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF),\
		.uartclk	= PIC_CLKS_PER_SEC,	\
		.type		= PORT_16550A,		\
		.serial_in	= nlm_xlr_uart_in,	\
		.serial_out	= nlm_xlr_uart_out,	\
	}

static struct plat_serial8250_port xlr_uart_data[] = {
    PORT(PIC_UART_0_IRQ),
    PORT(PIC_UART_1_IRQ),
    {},
};

static struct platform_device uart_device = {
    .name		= "serial8250",
    .id		= PLAT8250_DEV_PLATFORM,
    .dev = {
        .platform_data = xlr_uart_data,
    },
};

static int __init nlm_uart_init(void)
{
    unsigned long uartbase;

/*
 * What to do upon receipt of an interrupt.
 */
void
ie_intr(void *xsc)
{
	struct ie_softc *sc = (struct ie_softc *)xsc;
	u_short status;

	/* Clear the interrupt latch on the 3C507. */
	if (sc->hard_type == IE_3C507
	 && (inb(PORT(sc) + IE507_CTRL) & EL_CTRL_INTL))
		outb(PORT(sc) + IE507_ICTRL, 1);

	/* disable interrupts on the EE16. */
	if (sc->hard_type == IE_EE16)
		outb(PORT(sc) + IEE16_IRQ, sc->irq_encoded);

	status = sc->scb->ie_status;

loop:

	/* Don't ack interrupts which we didn't receive */
	ie_ack(sc, IE_ST_WHENCE & status);

	if (status & (IE_ST_RECV | IE_ST_RNR)) {
#ifdef DEBUG
		in_ierint++;
		if (ie_debug & IED_RINT)
			printf("ie%d: rint\n", sc->unit);
#endif
		ierint(sc);
#ifdef DEBUG
		in_ierint--;
#endif
	}
	if (status & IE_ST_DONE) {
#ifdef DEBUG
		in_ietint++;
		if (ie_debug & IED_TINT)
			printf("ie%d: tint\n", sc->unit);
#endif
		ietint(sc);
#ifdef DEBUG
		in_ietint--;
#endif
	}
	if (status & IE_ST_RNR) {
#ifdef DEBUG
		if (ie_debug & IED_RNR)
			printf("ie%d: rnr\n", sc->unit);
#endif
		iernr(sc);
	}
#ifdef DEBUG
	if ((status & IE_ST_ALLDONE) && (ie_debug & IED_CNA))
		printf("ie%d: cna\n", sc->unit);
#endif

	if ((status = sc->scb->ie_status) & IE_ST_WHENCE)
		goto loop;

	/* Clear the interrupt latch on the 3C507. */
	if (sc->hard_type == IE_3C507)
		outb(PORT(sc) + IE507_ICTRL, 1);

	/* enable interrupts on the EE16. */
	if (sc->hard_type == IE_EE16)
		outb(PORT(sc) + IEE16_IRQ, sc->irq_encoded | IEE16_IRQ_ENABLE);

}

/**
 * Send next binary value to demultiplexer
 * we have cycle of LEDS_AMOUNT values, blink them consecutively (don't forget
 * 		to reduce LEDs resistor according to LEDS_AMOUNT)
 */
void blink_next_LED(){
	PORT(LEDS_PORT, ODR) = LED_bits[current_LED++];
	if(current_LED == LEDS_AMOUNT)
		current_LED = 0;
}

void
sl_chan_attn(struct ie_softc *sc)
{
	outb(PORT(sc) + IEATT_ATTN, 0);
}

void
ee16_chan_attn(struct ie_softc *sc)
{
	outb(PORT(sc) + IEE16_ATTN, 0);
}

void
el_chan_attn(struct ie_softc *sc)
{
	outb(PORT(sc) + IE507_ATTN, 1);
}

void
sl_reset_586(struct ie_softc *sc)
{
	outb(PORT(sc) + IEATT_RESET, 0);
}

#elif defined(CONFIG_KM_PIGGY4_88E6352)

#include <mv88e6352.h>

#if defined(CONFIG_KM_NUSA)
struct mv88e_sw_reg extsw_conf[] = {
	/*
	 * port 0, PIGGY4, autoneg 
	 * first the fix for the 1000Mbits Autoneg, this is from
	 * a Marvell errata, the regs are undocumented
	 */
	{ PHY(0), PHY_PAGE, AN1000FIX_PAGE },
	{ PHY(0), PHY_STATUS, AN1000FIX },
	{ PHY(0), PHY_PAGE, 0 },
	/* now the real port and phy configuration */
	{ PORT(0), PORT_PHY, NO_SPEED_FOR },
	{ PORT(0), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
	{ PHY(0), PHY_1000_CTRL, NO_ADV },
	{ PHY(0), PHY_SPEC_CTRL, AUTO_MDIX_EN },
	{ PHY(0), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
		FULL_DUPLEX },
	/* port 1, unused */
	{ PORT(1), PORT_CTRL, PORT_DIS },
	{ PHY(1), PHY_CTRL, PHY_PWR_DOWN },
	{ PHY(1), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
	/* port 2, unused */
	{ PORT(2), PORT_CTRL, PORT_DIS },
	{ PHY(2), PHY_CTRL, PHY_PWR_DOWN },
	{ PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
	/* port 3, unused */
	{ PORT(3), PORT_CTRL, PORT_DIS },

int main() {
    line_t in_lines[8] = {
               PORT(B, 0),
               PORT(B, 1),
               PORT(B, 2),
               PORT(B, 3),
               PORT(B, 4),
               PORT(B, 5),
               PORT(B, 6),
               PORT(B, 7)
          },
          out_lines[16] = {
               PORT(B, 8),
               PORT(B, 11),
               PORT(B, 12),
               PORT(B, 15),
               PORT(D, 0),
               PORT(D, 2),
               PORT(D, 3),
               PORT(D, 4),
               PORT(D, 5),
               PORT(D, 6),
               PORT(D, 7),
               PORT(D, 8),
               PORT(D, 9),
               PORT(D, 10),
               PORT(D, 11),
               PORT(D, 12)
          };

    bus_t in_bus = initialise_bus(8, in_lines, BUS_INPUT_PULLUP),
          out_bus = initialise_bus(16, out_lines, BUS_OUTPUT);

    int input = 0, output;
    while (1) {
        input = read_data(&in_bus);

        output = 0;
        for (int i = 1, j = 3; i < (1 << 8); i <<= 1, j <<= 1) {
            if (input & i) {
                output |= j;
            }
        }

        set_data(&out_bus, output);
    }

    return 0;
}

#endif
	return 0;
}

int misc_init_r(void)
{
	ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
	return 0;
}

#if defined(CONFIG_KMVECT1)
#include <mv88e6352.h>
/* Marvell MV88E6122 switch configuration */
static struct mv88e_sw_reg extsw_conf[] = {
	/* port 1, FRONT_MDI, autoneg */
	{ PORT(1), PORT_PHY, NO_SPEED_FOR },
	{ PORT(1), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
	{ PHY(1), PHY_1000_CTRL, NO_ADV },
	{ PHY(1), PHY_SPEC_CTRL, AUTO_MDIX_EN },
	{ PHY(1), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
		FULL_DUPLEX },
	/* port 2, unused */
	{ PORT(2), PORT_CTRL, PORT_DIS },
	{ PHY(2), PHY_CTRL, PHY_PWR_DOWN },
	{ PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
	/* port 3, BP_MII (CPU), PHY mode, 100BASE */
	{ PORT(3), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
	/* port 4, ESTAR to slot 11, SerDes, 1000BASE-X */
	{ PORT(4), PORT_STATUS, NO_PHY_DETECT },
	{ PORT(4), PORT_PHY, SPEED_1000_FOR },
	{ PORT(4), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },

  {"Servname not supported for ai_socktype", 16},
  {"ai_socktype not supported", 17},
  {"System error", 18},
  {"Unknown error", 19},
  {"Copyright (C) 1999  Free Software Foundation, Inc.", 20},
  {"\
This program is free software with ABSOLUTELY NO WARRANTY; you may\n\
redistribute it under the terms of the GNU General Public License.", 21},
  {"version", 22},
  {"Usage: jwhois [OPTIONS] [QUERY]", 23},
  {"\
  --version               display version number and patch level\n\
  --help                  display this help\n\
  -c FILE, --config=FILE  use FILE as configuration file\n\
  -h HOST, --host=HOST    explicitly query HOST\n\
  -p PORT, --port=PORT    use port number PORT (in conjunction with HOST)\n\
  -v, --verbose           verbose debug output\n", 24},
  {"\
  -f, --force-lookup      force lookup even if the entry is cached\n\
  -d, --disable-cache     disable cache functions\n", 25},
  {"Report bugs to [email protected]", 26},
  {"invalid port number", 27},
  {"error allocating memory", 28},
  {"string out of bounds on line", 29},
  {"end of file looking for '\"' on line", 30},
  {"unexpected end of file on line", 31},
  {"multiple keys on line", 32},
  {"missing key on line", 33},
  {"error creating socket", 34},
  {"fatal error searching for host to query", 35},
  {"fatal error reading cache", 36},

 */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>

#define PORT(_base,_irq)                \
    {                        \
        .iobase        = _base,        \
        .irq        = _irq,            \
        .uartclk    = 1843200,        \
        .iotype        = UPIO_PORT,        \
        .flags        = UPF_BOOT_AUTOCONF,    \
    }

static struct plat_serial8250_port exar_data[] = {
    PORT(0x100, 5),
    PORT(0x108, 5),
    PORT(0x110, 5),
    PORT(0x118, 5),
    { },
};

static struct platform_device exar_device = {
    .name            = "serial8250",
    .id            = PLAT8250_DEV_EXAR_ST16C554,
    .dev            = {
        .platform_data    = exar_data,
    },
};

static int __init exar_init(void)

static void __sscape_write(int reg, int data)
{
    outb(reg, PORT(ODIE_ADDR));
    outb(data, PORT(ODIE_DATA));
}

#else
#define COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
#define COM4_FLAGS UPF_BOOT_AUTOCONF
#endif

#define PORT(_base,_irq,_flags)				\
	{						\
		.iobase		= _base,		\
		.irq		= _irq,			\
		.uartclk	= 1843200,		\
		.iotype		= UPIO_PORT,		\
		.flags		= _flags,		\
	}

static struct plat_serial8250_port x86_com_data[] = {
	PORT(0x3F8, 4, COM_FLAGS),
	PORT(0x2F8, 3, COM_FLAGS),
	PORT(0x3E8, 4, COM_FLAGS),
	PORT(0x2E8, 3, COM4_FLAGS),
	{ },
};

static struct platform_device x86_com_device = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= x86_com_data,
	},
};

static int force_legacy_probe;