/* a fiber pends on a semaphore then times out */
static void test_fiber_pend_and_timeout(int data, int unused)
{
	struct timeout_order_data *the_data = (void *)data;
	int32_t orig_ticks = sys_tick_get();
	int rv;

	ARG_UNUSED(unused);

	rv = nano_fiber_sem_take(the_data->sem, the_data->timeout);
	if (rv) {
		TC_ERROR(" *** timeout of %d did not time out.\n",
					the_data->timeout);
		return;
	}
	if (!is_timeout_in_range(orig_ticks, the_data->timeout)) {
		return;
	}

	nano_fiber_fifo_put(&timeout_order_fifo, the_data);
}

static int stm32_clock_control_get_subsys_rate(struct device *clock,
						clock_control_subsys_t sub_system,
						u32_t *rate)
{
	struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
	/*
	 * Get AHB Clock (= SystemCoreClock = SYSCLK/prescaler)
	 * SystemCoreClock is preferred to CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
	 * since it will be updated after clock configuration and hence
	 * more likely to contain actual clock speed
	 */
	u32_t ahb_clock = SystemCoreClock;
	u32_t apb1_clock = get_bus_clock(ahb_clock,
				CONFIG_CLOCK_STM32_APB1_PRESCALER);
#ifndef CONFIG_SOC_SERIES_STM32F0X
	u32_t apb2_clock = get_bus_clock(ahb_clock,
				CONFIG_CLOCK_STM32_APB2_PRESCALER);
#endif /* CONFIG_SOC_SERIES_STM32F0X */

	ARG_UNUSED(clock);

	switch (pclken->bus) {
	case STM32_CLOCK_BUS_AHB1:
	case STM32_CLOCK_BUS_AHB2:
		*rate = ahb_clock;
		break;
	case STM32_CLOCK_BUS_APB1:
#if defined(CONFIG_SOC_SERIES_STM32L4X) || defined(CONFIG_SOC_SERIES_STM32F0X)
	case STM32_CLOCK_BUS_APB1_2:
#endif /* CONFIG_SOC_SERIES_STM32L4X || CONFIG_SOC_SERIES_STM32F0X  */
		*rate = apb1_clock;
		break;
#ifndef CONFIG_SOC_SERIES_STM32F0X
	case STM32_CLOCK_BUS_APB2:
		*rate = apb2_clock;
		break;
#endif /* CONFIG_SOC_SERIES_STM32F0X */
	}

	return 0;
}

/**
 * @brief Perform basic hardware initialization at boot.
 *
 * This needs to be run from the very beginning.
 * So the init priority has to be 0 (zero).
 *
 * @return 0
 */
static int atmel_sam3x_init(struct device *arg)
{
	u32_t key;

	ARG_UNUSED(arg);

	/* Note:
	 * Magic numbers below are obtained by reading the registers
	 * when the SoC was running the SAM-BA bootloader
	 * (with reserved bits set to 0).
	 */

	key = irq_lock();

	/* Setup the flash controller.
	 * The bootloader is running @ 48 MHz with
	 * FWS == 2.
	 * When running at 84 MHz, FWS == 4 seems
	 * to be more stable, and allows the board
	 * to boot.
	 */
	__EEFC0->fmr = 0x00000400;
	__EEFC1->fmr = 0x00000400;

	_ClearFaults();

	/* Setup master clock */
	clock_init();

	/* Disable watchdog timer, not used by system */
	__WDT->mr |= WDT_DISABLE;

	/* Install default handler that simply resets the CPU
	 * if configured in the kernel, NOP otherwise
	 */
	NMI_INIT();

	irq_unlock(key);

	return 0;
}

static int qdec_nrfx_sample_fetch(struct device *dev, enum sensor_channel chan)
{
	struct qdec_nrfx_data *data = &qdec_nrfx_data;

	int16_t acc;
	int16_t accdbl;

	ARG_UNUSED(dev);

	LOG_DBG("");

	if ((chan != SENSOR_CHAN_ALL) && (chan != SENSOR_CHAN_ROTATION)) {
		return -ENOTSUP;
	}

	nrfx_qdec_accumulators_read(&acc, &accdbl);

	accumulate(data, acc);

	return 0;
}

static int pinmux_set(struct device *dev, uint32_t pin, uint32_t func)
{
	volatile struct __pio *port = _get_port(pin);
	uint32_t tmp;

	ARG_UNUSED(dev);

	if (!port) {
		return -EINVAL;
	}

	tmp = port->absr;
	if (func) {
		tmp |= (1 << (pin % 32));
	} else {
		tmp &= ~(1 << (pin % 32));
	}
	port->absr = tmp;

	return 0;
}

static void recv_cb(struct net_context *net_ctx, struct net_pkt *pkt,
		    int status, void *data)
{
	struct http_client_ctx *ctx = data;

	ARG_UNUSED(net_ctx);

	if (status) {
		return;
	}

	if (!pkt || net_pkt_appdatalen(pkt) == 0) {
		/*
		 * This block most likely handles a TCP_FIN message.
		 * (this means the connection is now closed)
		 * If we get here, and req.wait.count is still 0 this means
		 * http client is still waiting to parse a response body.
		 * This will will never happen now.  Instead of generating
		 * an ETIMEDOUT error in the future, let's unlock the
		 * req.wait semaphore and let the app deal with whatever
		 * data was parsed in the header (IE: http status, etc).
		 */
		if (ctx->req.wait.count == 0) {
			k_sem_give(&ctx->req.wait);
		}

		goto out;
	}

	/* receive_cb must take ownership of the received packet */
	if (ctx->tcp.receive_cb) {
		ctx->tcp.receive_cb(ctx, pkt);
		return;
	}

out:
	if (pkt) {
		net_pkt_unref(pkt);
	}
}

/**
 *
 * @brief Stack test fiber
 *
 * @param par1   Ignored parameter.
 * @param par2   Number of test loops.
 *
 * @return N/A
 *
 */
void stack_fiber1(int par1, int par2)
{
	int i;
	uint32_t data;

	ARG_UNUSED(par1);

	for (i = 0; i < par2 / 2; i++) {
		nano_fiber_stack_pop(&nano_stack_1, &data, TICKS_UNLIMITED);
		if (data != 2 * i) {
			break;
		}
		data = 2 * i;
		nano_fiber_stack_push(&nano_stack_2, data);
		nano_fiber_stack_pop(&nano_stack_1, &data, TICKS_UNLIMITED);
		if (data != 2 * i + 1) {
			break;
		}
		data = 2 * i + 1;
		nano_fiber_stack_push(&nano_stack_2, data);
	}
}

static void hpet_isr(void *arg)
{
	ARG_UNUSED(arg);
	k_spinlock_key_t key = k_spin_lock(&lock);
	u32_t now = MAIN_COUNTER_REG;
	u32_t dticks = (now - last_count) / cyc_per_tick;

	last_count += dticks * cyc_per_tick;

	if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL) ||
	    IS_ENABLED(CONFIG_QEMU_TICKLESS_WORKAROUND)) {
		u32_t next = last_count + cyc_per_tick;

		if ((s32_t)(next - now) < MIN_DELAY) {
			next += cyc_per_tick;
		}
		TIMER0_COMPARATOR_REG = next;
	}

	k_spin_unlock(&lock, key);
	z_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? dticks : 1);
}

static void fiberEntry(int task_thread_id, int arg1)
{
	int          rv;

	ARG_UNUSED(arg1);

	fiberEvidence++;    /* Prove to the task that the fiber has run */
	nano_fiber_sem_take(&wakeFiber, TICKS_UNLIMITED);

	rv = nanoCtxFiberTest((nano_thread_id_t) task_thread_id);
	if (rv != TC_PASS) {
		return;
	}

	/* Allow the task to print any messages before the next test runs */
	nano_fiber_sem_take(&wakeFiber, TICKS_UNLIMITED);

	rv = fiber_yieldTest();
	if (rv != TC_PASS) {
		return;
	}
}

void isr_rand(void *param)
{
	ARG_UNUSED(param);

	if (NRF_RNG->EVENTS_VALRDY) {
		u8_t last;

		last = rng->last + 1;
		if (last == rng->count) {
			last = 0;
		}

		if (last == rng->first) {
			/* this condition should not happen
			 * , but due to probable bug in HW
			 * , new value could be generated
			 * before task is stopped.
			 */
			NRF_RNG->TASKS_STOP = 1;
			NRF_RNG->EVENTS_VALRDY = 0;

			return;
		}

		rng->rand[rng->last] = NRF_RNG->VALUE;
		rng->last = last;

		last = rng->last + 1;
		if (last == rng->count) {
			last = 0;
		}

		NRF_RNG->EVENTS_VALRDY = 0;

		if (last == rng->first) {
			NRF_RNG->TASKS_STOP = 1;
		}
	}
}

int z_clock_driver_init(struct device *device)
{
	ARG_UNUSED(device);
	IRQ_CONNECT(TIMER_IRQ, DT_LITEX_TIMER0_E0002800_IRQ_0_PRIORITY,
			litex_timer_irq_handler, NULL, 0);
	irq_enable(TIMER_IRQ);

	sys_write8(TIMER_DISABLE, TIMER_EN_ADDR);

	for (int i = 0; i < 4; i++) {
		sys_write8(sys_clock_hw_cycles_per_tick() >> (24 - i * 8),
				TIMER_RELOAD_ADDR + i * 0x4);
		sys_write8(sys_clock_hw_cycles_per_tick() >> (24 - i * 8),
				TIMER_LOAD_ADDR + i * 0x4);
	}

	sys_write8(TIMER_ENABLE, TIMER_EN_ADDR);
	sys_write8(sys_read8(TIMER_EV_PENDING_ADDR), TIMER_EV_PENDING_ADDR);
	sys_write8(TIMER_EV, TIMER_EV_ENABLE_ADDR);

	return 0;
}

static void isr(void *arg)
{
	int byte, ret;

	ARG_UNUSED(arg);

	byte = random_byte_get();
	if (byte < 0) {
		return;
	}

	ret = rng_pool_put((struct rng_pool *)(entropy_nrf5_data.isr), byte);
	if (ret < 0) {
		ret = rng_pool_put((struct rng_pool *)(entropy_nrf5_data.thr),
				   byte);
		if (ret < 0) {
			nrf_rng_task_trigger(NRF_RNG_TASK_STOP);
		}

		k_sem_give(&entropy_nrf5_data.sem_sync);
	}
}

void stack_fiber1(int par1, int par2)
{
	int i;
	uint32_t data;

	ARG_UNUSED(par1);

	for (i = 0; i < par2 / 2; i++) {
		data = nano_fiber_stack_pop_wait(&nano_stack_1);
		if (data != 2 * i) {
			break;
		}
		data = 2 * i;
		nano_fiber_stack_push(&nano_stack_2, data);
		data = nano_fiber_stack_pop_wait(&nano_stack_1);
		if (data != 2 * i + 1) {
			break;
		}
		data = 2 * i + 1;
		nano_fiber_stack_push(&nano_stack_2, data);
	}
}

static int _bt_spi_init(struct device *unused)
{
	ARG_UNUSED(unused);

	spi_dev = device_get_binding(CONFIG_BLUETOOTH_SPI_DEV_NAME);
	if (!spi_dev) {
		BT_ERR("Failed to initialize SPI driver: %s",
		       CONFIG_BLUETOOTH_SPI_DEV_NAME);
		return -EIO;
	}

#if defined(CONFIG_BLUETOOTH_SPI_BLUENRG)
	cs_dev = device_get_binding(CONFIG_BLUETOOTH_SPI_CHIP_SELECT_DEV_NAME);
	if (!cs_dev) {
		BT_ERR("Failed to initialize GPIO driver: %s",
		       CONFIG_BLUETOOTH_SPI_CHIP_SELECT_DEV_NAME);
		return -EIO;
	}
#endif /* CONFIG_BLUETOOTH_SPI_BLUENRG */

	irq_dev = device_get_binding(CONFIG_BLUETOOTH_SPI_IRQ_DEV_NAME);
	if (!irq_dev) {
		BT_ERR("Failed to initialize GPIO driver: %s",
		       CONFIG_BLUETOOTH_SPI_IRQ_DEV_NAME);
		return -EIO;
	}

	rst_dev = device_get_binding(CONFIG_BLUETOOTH_SPI_RESET_DEV_NAME);
	if (!rst_dev) {
		BT_ERR("Failed to initialize GPIO driver: %s",
		       CONFIG_BLUETOOTH_SPI_RESET_DEV_NAME);
		return -EIO;
	}

	bt_hci_driver_register(&drv);

	return 0;
}

static
int stm32f10x_clock_control_get_subsys_rate(struct device *clock,
					    clock_control_subsys_t sub_system,
					    u32_t *rate)
{
	ARG_UNUSED(clock);

	u32_t subsys = POINTER_TO_UINT(sub_system);
	u32_t prescaler =
		CONFIG_CLOCK_STM32F10X_CONN_LINE_APB1_PRESCALER;
	/* assumes SYSCLK is SYS_CLOCK_HW_CYCLES_PER_SEC */
	u32_t ahb_clock =
		get_ahb_clock(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);

	if (subsys > STM32F10X_CLOCK_APB2_BASE) {
		prescaler =
			CONFIG_CLOCK_STM32F10X_CONN_LINE_APB2_PRESCALER;
	}

	*rate = get_apb_clock(ahb_clock, prescaler);

	return 0;
}

void _sys_power_save_idle_exit(int32_t ticks)
{
#if defined(CONFIG_SYS_POWER_LOW_POWER_STATE)
	/* Some CPU low power states require notification at the ISR
	 * to allow any operations that needs to be done before kernel
	 * switches task or processes nested interrupts. This can be
	 * disabled by calling _sys_soc_pm_idle_exit_notification_disable().
	 * Alternatively it can be simply ignored if not required.
	 */
	if (_sys_pm_idle_exit_notify) {
		_sys_soc_resume();
	}
#endif
#ifdef CONFIG_TICKLESS_IDLE
	if ((ticks == K_FOREVER) || ticks >= _sys_idle_threshold_ticks) {
		/* Resume normal periodic system timer interrupts */

		_timer_idle_exit();
	}
#else
	ARG_UNUSED(ticks);
#endif /* CONFIG_TICKLESS_IDLE */
}

/**
 * @brief Perform basic hardware initialization at boot.
 *
 * This needs to be run from the very beginning.
 * So the init priority has to be 0 (zero).
 *
 * @return 0
 */
static int stm32f1_init(struct device *arg)
{
	u32_t key;

	ARG_UNUSED(arg);

	key = irq_lock();

	_ClearFaults();

	/* Install default handler that simply resets the CPU
	 * if configured in the kernel, NOP otherwise
	 */
	NMI_INIT();

	irq_unlock(key);

	/* Update CMSIS SystemCoreClock variable (HCLK) */
	/* At reset, system core clock is set to 8 MHz from HSI */
	SystemCoreClock = 8000000;

	return 0;
}

/**
 *
 * @brief Initialize one UART as the console/debug port
 *
 * @return 0 if successful, otherwise failed.
 */
static int uart_console_init(struct device *arg)
{

	ARG_UNUSED(arg);

	uart_console_dev = device_get_binding(CONFIG_UART_CONSOLE_ON_DEV_NAME);

#if defined(CONFIG_USB_UART_CONSOLE) && defined(CONFIG_USB_UART_DTR_WAIT)
	while (1) {
		u32_t dtr = 0;

		uart_line_ctrl_get(uart_console_dev, LINE_CTRL_DTR, &dtr);
		if (dtr) {
			break;
		}
	}
	k_busy_wait(1000000);
#endif

	uart_console_hook_install();

	return 0;
}

/* Note: this function has public linkage, and MUST have this
 * particular name.  The platform architecture itself doesn't care,
 * but there is a test (tests/kernel/arm_irq_vector_table) that needs
 * to find it to it can set it in a custom vector table.  Should
 * probably better abstract that at some point (e.g. query and reset
 * it by pointer at runtime, maybe?) so we don't have this leaky
 * symbol.
 */
void rtc1_nrf_isr(void *arg)
{
	ARG_UNUSED(arg);
	RTC->EVENTS_COMPARE[0] = 0;

	u32_t key = irq_lock();
	u32_t t = counter();
	u32_t dticks = counter_sub(t, last_count) / CYC_PER_TICK;

	last_count += dticks * CYC_PER_TICK;

	if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
		u32_t next = last_count + CYC_PER_TICK;

		if (counter_sub(next, t) < MIN_DELAY) {
			next += CYC_PER_TICK;
		}
		set_comparator(next);
	}

	irq_unlock(key);
	z_clock_announce(dticks);
}

int net_nbr_unlink(struct net_nbr *nbr, struct net_linkaddr *lladdr)
{
	ARG_UNUSED(lladdr);

	if (nbr->idx == NET_NBR_LLADDR_UNKNOWN) {
		return -EALREADY;
	}

	NET_ASSERT(nbr->idx < CONFIG_NET_IPV6_MAX_NEIGHBORS);
	NET_ASSERT(net_neighbor_lladdr[nbr->idx].ref > 0);

	net_neighbor_lladdr[nbr->idx].ref--;

	if (!net_neighbor_lladdr[nbr->idx].ref) {
		memset(net_neighbor_lladdr[nbr->idx].lladdr.addr, 0,
		       sizeof(net_neighbor_lladdr[nbr->idx].lladdr.storage));
	}

	nbr->idx = NET_NBR_LLADDR_UNKNOWN;
	nbr->iface = NULL;

	return 0;
}