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C++ hls::stream类代码示例

原作者: [db:作者] 来自: [db:来源] 收藏 邀请

本文整理汇总了C++中hls::stream类的典型用法代码示例。如果您正苦于以下问题：C++ stream类的具体用法？C++ stream怎么用？C++ stream使用的例子？那么恭喜您, 这里精选的类代码示例或许可以为您提供帮助。



在下文中一共展示了stream类的20个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于我们的系统推荐出更棒的C++代码示例。

示例1: pricing

void pricing(hls::stream<float> in, hls::stream<float> out, hls::stream<float> out2, float strike_price) {
	//#pragma HLS PIPELINE II=1

	const int BLOCK = 64;
	static ap_uint<32> res_cnt[BLOCK];
	static float res_sum[BLOCK];
	static float res_prod[BLOCK];

	for (int i = 0; i < BLOCK; ++i) {
		#pragma HLS PIPELINE II=1
		float path = in.read();
		float res = max_0(hls::expf(path) - strike_price);


		ap_uint<32> l_cnt = res_cnt[i];
		float l_sum = res_sum[i];
		float l_prod = res_prod[i];

		ap_uint<32> n_cnt = l_cnt + 1;
		float delta = res - l_sum;
		float n_sum = l_sum + delta / n_cnt;
		float n_prod = l_prod + delta * (res - n_sum);

		res_cnt[i] = n_cnt;
		res_sum[i] = n_sum;
		res_prod[i] = n_prod;


		out.write(res_sum[i]);
		out2.write(res_prod[i]);
	}

	//std::max(0.f, hls::expf(path) - strike_price);
}
开发者ID:jaechoon2，项目名称:finance.zynqpricer.hls，代码行数:34，代码来源:pricing_hls.cpp


示例2: dut

void dut(
    hls::stream<bit32_t> &strm_in,
    hls::stream<bit32_t> &strm_out
)
{
  // -----------------------------
  // YOUR CODE GOES HERE
  // -----------------------------
  digit  in_digit;
  bit4_t out_bit4;

  // ------------------------------------------------------
  // Input processing
  // ------------------------------------------------------
  // read the two input 32-bit words (low word first)
  bit32_t input_lo = strm_in.read();
  bit32_t input_hi = strm_in.read();

  // Convert input raw bits to digit 49-bit representation via bit slicing
  in_digit(31, 0) = input_lo;
  in_digit(in_digit.length()-1, 32) = input_hi;

  // ------------------------------------------------------
  // Call digitrec
  // ------------------------------------------------------
  out_bit4 = digitrec( in_digit );

  // ------------------------------------------------------
  // Output processing
  // ------------------------------------------------------

  // Write out the recognized digit (0-9)
  strm_out.write( out_bit4(out_bit4.length()-1, 0) );
}
开发者ID:orangeqi，项目名称:zedboard，代码行数:34，代码来源:digitrec.cpp


示例3: fir_sw

void fir_sw(hls::stream<int> &input_val, hls::stream<int> &output_val)
{
	int i;
	static short shift_reg[TAPS] = {0};
	const short coeff[TAPS] = {6,0,-4,-3,5,6,-6,-13,7,44,64,44,7,-13,
                                 -6,6,5,-3,-4,0,6};

	for(i=0; i < RUN_LENGTH; i++){
		int sample;
		sample = input_val.read();

		//Shift Register
		for(int j=0; j < TAPS-1; j++){
			shift_reg[j] = shift_reg[j+1];
		}
		shift_reg[TAPS-1] = sample;

		//Filter Operation
		int acc = 0;
		for(int k=0; k < TAPS; k++){
			acc += shift_reg[k] * coeff[k];
		}
		output_val.write(acc);
	}
}
开发者ID:thnguyn2，项目名称:ECE_527_testing_code，代码行数:25，代码来源:fir_test.cpp


示例4: writeDirections

/**
 * Write the directions as u32 to the output AXI stream
 */
void writeDirections(hls::stream<uint32>& out, uint16 numDirections) {
#pragma HLS INLINE

	out.write(numDirections);

	uint16 directionIx = 0;

	writeDirectionsLoop: for (uint8 i = 0; i < MAX_NUM_DIRECTIONS / DIRECTIONS_IN_BUS; i++) {
#pragma HLS LOOP_TRIPCOUNT min=8 max=32 // Min: MIN_NUM_DIRECTIONS / DIRECTIONS_IN_BUS (8) Max: MAX_NUM_DIRECTIONS / DIRECTIONS_IN_BUS (32) Actual: numDirections
		uint32 output = 0;

		// Compress from a series of u8 to a smaller series of u32 with padding
		writeDirectionsShiftLoop: for (uint8 j = 0; j < DIRECTIONS_IN_BUS; j++) {
#pragma HLS UNROLL
			output <<= DIRECTION_SIZE;

			uint8 padChar = 0;
			output |= i * DIRECTIONS_IN_BUS + j < numDirections ? directions[directionIx + j] : padChar;
		}

		out.write(output);

		directionIx += DIRECTIONS_IN_BUS;

		if (directionIx >= numDirections) {
			break;
		}
	}
}
开发者ID:oloftus，项目名称:embs-assessment-sum2015，代码行数:32，代码来源:toplevel.cpp


示例5: toplevel

void toplevel(hls::stream<uint32>& in, hls::stream<uint32>& out) {

#pragma HLS INTERFACE ap_fifo port=in
#pragma HLS INTERFACE ap_fifo port=out
#pragma HLS RESOURCE variable=in core=AXI4Stream
#pragma HLS RESOURCE variable=out core=AXI4Stream
#pragma HLS INTERFACE ap_ctrl_none port=return

#pragma HLS ARRAY_PARTITION variable=openings complete dim=1
#pragma HLS ARRAY_PARTITION variable=inGrid complete dim=1
#pragma HLS ARRAY_MAP variable=directions instance=instance1 horizontal
#pragma HLS ARRAY_MAP variable=tile instance=instance1 horizontal

	uint8 tileCoords = in.read();
	uint8 tileSize = in.read();
	uint8 tileDataLen = in.read(); // Number of 32-bit bits
	readData(in, tileDataLen);

	uint8 numOpenings = findOpenings(tileSize);
	out.write(tileCoords);
	out.write(numOpenings);

	if (numOpenings > 0) {
		writeEntrance(out);
		findDeadEnds(tileSize);
		uint16 numDirections = findPath(tileSize);
		writeDirections(out, numDirections);
	}
}
开发者ID:oloftus，项目名称:embs-assessment-sum2015，代码行数:29，代码来源:toplevel.cpp


示例6: antithetic

void antithetic(
		hls::stream<float> &rn_in,
		hls::stream<float> &rn_out_1,
		hls::stream<float> &rn_out_2)
{
	#pragma HLS interface ap_fifo port=rn_in
	#pragma HLS resource core=AXI4Stream variable=rn_in

	#pragma HLS interface ap_fifo port=rn_out_1
	#pragma HLS resource core=AXI4Stream variable=rn_out_1
	#pragma HLS interface ap_fifo port=rn_out_2
	#pragma HLS resource core=AXI4Stream variable=rn_out_2

	#pragma HLS interface ap_ctrl_none port=return

	//for (int i = 0; i < 10 / 2; ++i) {
	{
	//while (true) {
		#pragma HLS PIPELINE II=2

		float r1 = rn_in.read();
		float r2 = rn_in.read();

		rn_out_1.write(r1);
		rn_out_2.write(r2);

		rn_out_1.write(negate(r1));
		rn_out_2.write(negate(r2));
	}
}
开发者ID:jaechoon2，项目名称:finance.zynqpricer.hls，代码行数:30，代码来源:antithetic_hls.cpp


示例7: gauss_transform

void gauss_transform(
		hls::stream<uint32_t> &uniform_rns,
		hls::stream<float> &gaussian_rns) {
	#pragma HLS interface ap_fifo port=uniform_rns
	#pragma HLS resource core=AXI4Stream variable=uniform_rns

	#pragma HLS interface ap_fifo port=gaussian_rns
	#pragma HLS resource core=AXI4Stream variable=gaussian_rns

	#pragma HLS interface ap_ctrl_none port=return

	float u1, u2, r, z1, z2;
	while (true){
	//for (int i = 0; i < 100/2; ++i) {
		#pragma HLS PIPELINE II=2
		// intervall (0:1]
		u1 = ((float)uniform_rns.read() + 1.f) * (float)(1.0 / 4294967296.0);
		// intervall (0:2PI]
		u2 = ((float)uniform_rns.read() + 1.f) * (float)(2 * M_PI / 4294967296.0);
		r = hls::sqrtf(-2 * hls::logf(u1));
		z1 = r * hls::cosf(u2);
		z2 = r * hls::sinf(u2);
		gaussian_rns.write(z1);
		gaussian_rns.write(z2);
	}

}
开发者ID:jaechoon2，项目名称:finance.zynqpricer.hls，代码行数:27，代码来源:gauss_transform_hls.cpp


示例8: dut

void dut(
    hls::stream<bit32_t> &strm_in,
    hls::stream<bit32_t> &strm_out
)
{
  // Declare the input and output variables
  complex<float> out[4096];
  complex<float> complex_In1[4096];
  complex<float> complex_In2[4096];
  float input_data_re = 0;

  //-------------------------------------------------------
  // Input processing
  //-------------------------------------------------------
  // Read the two input 32-bit words
  bit32_t input1_lo;
  bit32_t input2_hi;
  bit32_t output_r;
  bit32_t output_i;
 
  for(int i = 0; i < 4096 ;i++) 
  {
    input1_lo = strm_in.read();
    input2_hi = strm_in.read();
    input_data_re = input1_lo;
    complex_In1[i] = complex<float>(input_data_re, 0);
    input_data_re = input2_hi;
    complex_In2[i] = complex<float>(input_data_re, 0);

  }

//  for(int m = 0; m < 4096 ;m++)
//  {
////    input_data_re = in1[m];
//    complex_In1[m] = complex<float>(80, 0);
////    input_data_re = in2[m];
//    complex_In2[m] = complex<float>(80, 0);
//  }
 
  // ------------------------------------------------------
  // Call Hybrid Imaging
  // ------------------------------------------------------
  hybrid_image(12, complex_In1, complex_In2, out );

  // ------------------------------------------------------
  // Output processing
  // ------------------------------------------------------
  // Write out the computed digit value
  
  for(int i = 0; i < 4096 ;i++)  
  { 
//    printf("%f\n",out[i]);
//    output = out[i];
    output_r = out[i].real();
    output_i = out[i].imag();
    strm_out.write(output_r);
    strm_out.write(output_i );
  }
}
开发者ID:vg249，项目名称:ECE5775_HybridImageProject，代码行数:59，代码来源:hybrid_image.cpp


示例9: fill_gaussian_rng_stream

void fill_gaussian_rng_stream(hls::stream<calc_t> &rns, unsigned size) {
	double z0, z1;
	for (unsigned i = 0; i < size; ++i) {
		box_muller(z0, z1);
		rns.write(z0);
		if (++i < size)
			rns.write(z1);
	}
}
开发者ID:jaechoon2，项目名称:finance.zynqpricer.hls，代码行数:9，代码来源:heston_kernel_ml_tb.cpp


示例10: accumSW

// -----------------------------------------------------------
void accumSW(	const uint32_t stepsMC,
				const uint32_t pathsMC,
				hls::stream<float> &inData,
				hls::stream<float> &outAccum )
{
	printf("accumSW\n");

	float sums[ACCUM_ELEM];
	#pragma HLS RESOURCE variable=sums core=RAM_2P_BRAM
	#pragma HLS DEPENDENCE variable=sums false

	stepsLoop:for(uint32_t step=0; step<=stepsMC; ++step)
	{
		// ------------------------------------------
		resetLoop:for(uint8_t i=0; i<ACCUM_ELEM; ++i)
		{
	#pragma HLS PIPELINE II=1 enable_flush

			sums[i] = (float) 0.0f;
		}

		// ------------------------------------------
		uint8_t index = (uint8_t) 0;

		pathsLoop:for(uint32_t i=0; i<pathsMC; ++i)
		{
	#pragma HLS PIPELINE II=1 enable_flush

			float data = inData.read();
			float oldSum = sums[index];
			float newSum = oldSum + data;

			sums[index] = newSum;

			index = (index<(ACCUM_ELEM-1))?++index:(uint8_t)0;
		}

		// ------------------------------------------
		float totalSum = (float) 0.0f;

		totalLoop:for(uint8_t i=0; i<ACCUM_ELEM;++i)
		{
	#pragma HLS PIPELINE II=1
			totalSum += sums[i];
		}

		// ------------------------------------------
		outAccum.write(totalSum);
	}

	return;
}
开发者ID:xupgit，项目名称:finance.americanoption.zynq.hls，代码行数:53，代码来源:LSupdate2_tb.cpp


示例11: fe_wfl

void fe_wfl(hls::stream< ap_uint<32> > sampleFifo, hls::stream< ap_uint<32> > featureFifo, ap_uint<8> windowSize) {
#pragma HLS INTERFACE ap_ctrl_none port=return
#pragma HLS INTERFACE ap_fifo port=featureFifo
#pragma HLS INTERFACE ap_fifo port=sampleFifo

    ap_uint<32> data;

    ap_int<32> wflChannel1 = 0;
    ap_int<32> wflChannel2 = 0;

    ap_int<16> sampleChannel1 = 0;
    ap_int<16> sampleChannel2 = 0;

    ap_int<16> prevSampleChannel1 = 0;
    ap_int<16> prevSampleChannel2 = 0;   

    ap_uint<8> cntSamples = 0;
    
    // Wait for Samples to arrive in FIFO
    while( windowSize == 0 ) {

    }

    while(1) {
        wflChannel1 = 0;
        wflChannel2 = 0;

        // Count zero-crossing for channel 1 & 2
        for(cntSamples = 0; cntSamples < windowSize; cntSamples++) {
            // Read data from Sample-FIFO
            // 2 16 bit Samples at one position in 32 bit FIFO => Process 2 channels in parallel
            data = sampleFifo.read();

            sampleChannel1 = data(15, 0);
            sampleChannel2 = data(31, 16);

            if (cntSamples > 0) {
                wflChannel1 += abs2(sampleChannel1 - prevSampleChannel1);
                wflChannel2 += abs2(sampleChannel2 - prevSampleChannel2);
            }

            prevSampleChannel1 = sampleChannel1;
            prevSampleChannel2 = sampleChannel2;
        }

        // Write back features to Feature-FIFO
        featureFifo.write(wflChannel1);
        featureFifo.write(wflChannel2);
    }
}
开发者ID:openhw-upb，项目名称:xil-54180，代码行数:50，代码来源:fe_wfl.cpp


示例12: 

// -----------------------------------------------------------
void lsupdate2SW	( 	const uint32_t stepsMC,
						const uint32_t pathsMC,
						const float discount,
						hls::stream<float> &contin_in,
						hls::stream<float> &payoff_in,
						hls::stream<float> &cashFlow_in,
						hls::stream<float> &cashFlow_out,
						hls::stream<float> &cashFlowDisc_out,
						hls::stream<float> &toAccum_out )
{
	printf("lsupdate2SW\n");

	zerosLoop:for(uint32_t path=0; path<pathsMC; ++path)
	{
#pragma HLS PIPELINE II=1 enable_flush
		// ---------------------------------
		// write to outputs
		cashFlow_out.write((float) 0.0f);

		cashFlowDisc_out.write((float) 0.0f);
	}


	stepsLoop:for(uint32_t step=0; step<=stepsMC; ++step)
	{
		pathsLoop:for(uint32_t path=0; path<pathsMC; ++path)
		{
	#pragma HLS PIPELINE II=1 enable_flush

			float continuation = contin_in.read();
			float payoff       = payoff_in.read();

			float cashFlow = cashFlow_in.read();

			float discountedCashFlow = discount * cashFlow;

			// ---------------------------------
			float newY;

			if( (payoff > (float) 0.0f) && (payoff >= (float) continuation) )
				newY = payoff;
			else
				newY = discountedCashFlow;

			// ---------------------------------
			// write to outputs
			if(step < stepsMC)
				cashFlow_out.write(newY);

			if(step < stepsMC)
				cashFlowDisc_out.write(discount * newY);

			if(step == stepsMC)
				toAccum_out.write(newY);
		}
	}

	return;
}
开发者ID:xupgit，项目名称:finance.americanoption.zynq.hls，代码行数:60，代码来源:LSupdate2_tb.cpp


示例13: cflowaccumregio

void cflowaccumregio(	const uint32_t pathsMC,
						float *totalSum,
						hls::stream<float> &inData )

{
#pragma HLS INTERFACE s_axilite port=return bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=pathsMC bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=totalSum bundle=CONTROL

#pragma HLS INTERFACE axis register port=inData


	////////////////////////////////////////////////////////////////////////////////////////////////////////////

	//static float sums[N];
	float sums[NELEMENTS];
	#pragma HLS RESOURCE variable=sums core=RAM_2P_BRAM
	#pragma HLS dependence variable=sums false

	resetLoop:for(uint8_t i=0; i<NELEMENTS; ++i)
	{
#pragma HLS PIPELINE II=1

		sums[i] = (float) 0.0f;
	}

	uint8_t index = (uint8_t) 0;

	pathsLoop:for(uint32_t i=0; i<pathsMC; ++i)
	{
#pragma HLS PIPELINE II=1

		float data = inData.read();
		float oldSum = sums[index];
		float newSum = oldSum + data;

		sums[index] = newSum;

		index = (index<(NELEMENTS-1))?++index:(uint8_t)0;
	}


	float total = (float) 0.0f;

	totalLoop:for(uint8_t i=0; i<NELEMENTS;++i)
	{
#pragma HLS PIPELINE II=1
		total += sums[i];
	}

	*totalSum = total;

	return;
}
开发者ID:xupgit，项目名称:finance.americanoption.zynq.hls，代码行数:54，代码来源:accumulator_hls.cpp


示例14: toplevel

//Top-level function
void toplevel(hls::stream<uint32> &input, hls::stream<uint32> &output) {
#pragma HLS INTERFACE ap_fifo port=input
#pragma HLS INTERFACE ap_fifo port=output
#pragma HLS RESOURCE variable=input core=AXI4Stream
#pragma HLS RESOURCE variable=output core=AXI4Stream
#pragma HLS INTERFACE ap_ctrl_none port=return

		uint32 command;

		init();

		side = input.read();
		ntiles = side * side;

		for(u8 t = 0; t < ntiles; t++)
			for (u8 e = 0; e < 4; e++)
				tiles[t][e] = input.read();

		mapcolours();

		// we start off with tile 0 in position 0
	    avail &= ~BIT36(0);

	    seq = 1;
	    while (!terminate) {
	    	if (seq == 1)
	    		solve();

			if (terminate) {
				output.write(0);
				break;
			}

			/* use magic flag to enforce sequencing */
			seq = 0;
			output.write(1);
			if (seq == 0)
				command = input.read();
			seq = 1;

			/* command 0: terminate */
			if (command == 0)
				break;

			/* command 1: write output */
			if (command == 1)
				for (u8 p = 0; p < ntiles; p++)
					for(u8 e = 0; e < 4; e++)
						output.write(colour(p, e));

			/* any other command (canonically 2) will cause search
			 * to continue without output */
			if (seq == 0)
				backtrack();
			seq = 1;
	    }
}
开发者ID:qlkzy，项目名称:embs-summer，代码行数:58，代码来源:toplevel.cpp


示例15: readData

/**
 * Read data from the AXI stream and convert from uint32 to uint1
 */
void readData(hls::stream<uint32> &in, uint8 tileDataLen) {
#pragma HLS INLINE

	readLoop: for (uint8 i = 0; i < tileDataLen; i++) {
#pragma HLS LOOP_TRIPCOUNT min=5 max=18 // Min: MIN_TILE_DATA_32 (5) Max: MAX_TILE_DATA_32 (18) Actual: tileDataLen
		inGrid[i] = in.read();

		// Convert data from 18 * 32 => 576 * 1
		readShiftLoop: for (uint8 j = 0; j < BUS_WIDTH; j++) {
#pragma HLS UNROLL

			uint16 ix = i * BUS_WIDTH + (BUS_WIDTH - j - 1); // (BUS_WIDTH - j - 1) necessary to preserve direction
			tile[ix] = (inGrid[i] & (1 << j)) ? 1 : 0;
		}
	}
}
开发者ID:oloftus，项目名称:embs-assessment-sum2015，代码行数:19，代码来源:toplevel.cpp


示例16: writeEntrance

/**
 * Write out the entrance coordinates and directions
 */
void writeEntrance(hls::stream<uint32>& out) {
#pragma HLS INLINE

	uint32 output = 0;

	output |= openings[0]; // Entrance row
	output <<= 4;
	output |= openings[1]; // Entrance column
	output <<= 4;
	output |= openings[2]; // Entrance side
	output <<= 4;
	output |= openings[3]; // Exit row
	output <<= 4;
	output |= openings[4]; // Exit col
	output <<= 4;
	output |= openings[5]; // Exit side

	out.write(output);
}
开发者ID:oloftus，项目名称:embs-assessment-sum2015，代码行数:22，代码来源:toplevel.cpp


示例17: lsdatagenregio

void lsdatagenregio ( const uint32_t stepsMC,
						const uint32_t pathsMC,
						const float K,
						const uint32_t callPut,
						volatile uint32_t *peekStep,
						volatile uint32_t *peekPath,
						hls::stream<float> &stock,
						hls::stream<float> &cashFlow,
						hls::stream<float> &stream_x0,
						hls::stream<float> &stream_x1,
						hls::stream<float> &stream_x2,
						hls::stream<float> &stream_x3,
						hls::stream<float> &stream_x4,
						hls::stream<float> &stream_y,
						hls::stream<float> &stream_yx,
						hls::stream<float> &stream_yx2 )
{
#pragma HLS INTERFACE axis register port=stock
#pragma HLS INTERFACE axis register port=cashFlow

#pragma HLS INTERFACE axis register port=stream_x0
#pragma HLS INTERFACE axis register port=stream_x1
#pragma HLS INTERFACE axis register port=stream_x2
#pragma HLS INTERFACE axis register port=stream_x3
#pragma HLS INTERFACE axis register port=stream_x4
#pragma HLS INTERFACE axis register port=stream_y
#pragma HLS INTERFACE axis register port=stream_yx
#pragma HLS INTERFACE axis register port=stream_yx2

#pragma HLS INTERFACE s_axilite port=peekStep bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=peekPath bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=callPut bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=K bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=pathsMC bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=stepsMC bundle=CONTROL
#pragma HLS INTERFACE s_axilite port=return bundle=CONTROL


	*peekStep = 0xFFFFFFFF;
	*peekPath = 0xFFFFFFFF;

	stepsLoop:for(uint32_t step=0; step < stepsMC; ++step)
	{
		*peekStep = step;

		pathsLoop:for(uint32_t path=0; path<pathsMC; ++path)
		{
//#pragma HLS PIPELINE II=1 enable_flush
#pragma HLS PIPELINE II=1

			float s = stock.read();
			float cflow = cashFlow.read();

			// ---------------------------------
			// in-the-money calculation
			float diff = (s-K);

			float payoff;

			if(callPut == 0)
				payoff = diff;
			else
				payoff = -diff;

			bool inTheMoney;

			if( payoff > 0.0f )
				inTheMoney = true;
			else
				inTheMoney = false;

			// ---------------------------------
			// basis functions
			float s2 = s*s;

			float x0;
			float x1;
			float x2;
			float y;

			if(inTheMoney == true)
			{
				x0 = (float) 1.0f;
				x1 = (float) s;
				x2 = (float) s2;
				y  = (float) cflow;
			}
			else
			{
				x0 = (float) 0.0f;
				x1 = (float) 0.0f;
				x2 = (float) 0.0f;
				y  = (float) 0.0f;
			}

			// remaining multipliers
			float x3  = x1*x2;
			float x4  = x2*x2;
			float yx  =  y*x1;
			float yx2 =  y*x2;
//.........这里部分代码省略.........
开发者ID:xupgit，项目名称:finance.americanoption.zynq.hls，代码行数:101，代码来源:lsDataGen_hls.cpp


示例18: pyrconstuct_top

void pyrconstuct_top (
    std::complex<ap_fixed<16, 1, (ap_q_mode) 5, (ap_o_mode)3, 0> > imgIn[512],
    hls::stream<std::complex<ap_fixed<17, 6, (ap_q_mode) 0, (ap_o_mode)3, 0> > >& pyrFilOut,
    const int nL)
{
    fstream wrapc_switch_file_token;
    wrapc_switch_file_token.open(".hls_cosim_wrapc_switch.log");
    int AESL_i;
    if (wrapc_switch_file_token.good())
    {
        static unsigned AESL_transaction_pc = 0;
        string AESL_token;
        string AESL_num;
        static AESL_FILE_HANDLER aesl_fh;

        // define output stream variables: "pyrFilOut"
        std::vector<std::complex<ap_fixed<17, 6, (ap_q_mode) 0, (ap_o_mode)3, 0> > > aesl_tmp_0;
        int aesl_tmp_1;
        int aesl_tmp_2 = 0;

        // read output stream size: "pyrFilOut"
        aesl_fh.read(WRAPC_STREAM_SIZE_OUT_pyrFilOut_V, AESL_token); // [[transaction]]
        aesl_fh.read(WRAPC_STREAM_SIZE_OUT_pyrFilOut_V, AESL_num); // transaction number

        if (atoi(AESL_num.c_str()) == AESL_transaction_pc)
        {
            aesl_fh.read(WRAPC_STREAM_SIZE_OUT_pyrFilOut_V, AESL_token); // pop_size
            aesl_tmp_1 = atoi(AESL_token.c_str());
            aesl_fh.read(WRAPC_STREAM_SIZE_OUT_pyrFilOut_V, AESL_token); // [[/transaction]]
        }

        // output port post check: "pyrFilOut_V"
        aesl_fh.read(AUTOTB_TVOUT_PC_pyrFilOut_V, AESL_token); // [[transaction]]
        if (AESL_token != "[[transaction]]")
        {
            exit(1);
        }
        aesl_fh.read(AUTOTB_TVOUT_PC_pyrFilOut_V, AESL_num); // transaction number

        if (atoi(AESL_num.c_str()) == AESL_transaction_pc)
        {
            aesl_fh.read(AUTOTB_TVOUT_PC_pyrFilOut_V, AESL_token); // data

            std::vector<sc_bv<34> > pyrFilOut_V_pc_buffer;
            int i = 0;

            while (AESL_token != "[[/transaction]]")
            {
                bool no_x = false;
                bool err = false;

                // search and replace 'X' with "0" from the 1st char of token
                while (!no_x)
                {
                    size_t x_found = AESL_token.find('X');
                    if (x_found != string::npos)
                    {
                        if (!err)
                        {
                            cerr << "@W [SIM-201] RTL produces unknown value 'X' on port 'pyrFilOut_V', possible cause: There are uninitialized variables in the C design." << endl;
                            err = true;
                        }
                        AESL_token.replace(x_found, 1, "0");
                    }
                    else
                    {
                        no_x = true;
                    }
                }

                no_x = false;

                // search and replace 'x' with "0" from the 3rd char of token
                while (!no_x)
                {
                    size_t x_found = AESL_token.find('x', 2);

                    if (x_found != string::npos)
                    {
                        if (!err)
                        {
                            cerr << "@W [SIM-201] RTL produces unknown value 'X' on port 'pyrFilOut_V', possible cause: There are uninitialized variables in the C design." << endl;
                            err = true;
                        }
                        AESL_token.replace(x_found, 1, "0");
                    }
                    else
                    {
                        no_x = true;
                    }
                }

                // push token into output port buffer
                if (AESL_token != "")
                {
                    pyrFilOut_V_pc_buffer.push_back(AESL_token.c_str());
                    i++;
                }

                aesl_fh.read(AUTOTB_TVOUT_PC_pyrFilOut_V, AESL_token); // data or [[/transaction]]
//.........这里部分代码省略.........
开发者ID:peachypakorn，项目名称:SeniorProject，代码行数:101，代码来源:apatb_pyrconstuct_top.cpp


示例19: heston_kernel_sl

// For next interface change
//TODO(brugger): remove step_size
//TODO(brugger): path_cnt should be uint64_t
//TODO(brugger): add correlation
void heston_kernel_sl(
		// call option
		calc_t log_spot_price,
		calc_t reversion_rate_TIMES_step_size,
		calc_t long_term_avg_vola,
		calc_t vol_of_vol_TIMES_sqrt_step_size,
		calc_t double_riskless_rate, // = 2 * riskless_rate
		calc_t vola_0,
//		calc_t correlation,
//		calc_t time_to_maturity,
	    // both knockout
		calc_t log_lower_barrier_value,
		calc_t log_upper_barrier_value,
		// simulation params
		uint32_t step_cnt,
		calc_t step_size, // = time_to_maturity / step_cnt
		calc_t half_step_size, // = step_size / 2
		calc_t sqrt_step_size, // = sqrt(step_size)
		calc_t barrier_correction_factor, // = BARRIER_HIT_CORRECTION * sqrt_step_size
		uint32_t path_cnt,

		hls::stream<calc_t> &gaussian_rn1,
		hls::stream<calc_t> &gaussian_rn2,
		hls::stream<calc_t> &prices)
{
	#pragma HLS interface ap_none port=log_spot_price
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=log_spot_price
	#pragma HLS interface ap_none port=reversion_rate_TIMES_step_size
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=reversion_rate_TIMES_step_size
	#pragma HLS interface ap_none port=long_term_avg_vola
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=long_term_avg_vola
	#pragma HLS interface ap_none port=vol_of_vol_TIMES_sqrt_step_size
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=vol_of_vol_TIMES_sqrt_step_size
	#pragma HLS interface ap_none port=double_riskless_rate
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=double_riskless_rate
	#pragma HLS interface ap_none port=vola_0
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=vola_0
//	#pragma HLS interface ap_none port=correlation
//	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=correlation
//	#pragma HLS interface ap_none port=time_to_maturity
//	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=time_to_maturity
	#pragma HLS interface ap_none port=log_lower_barrier_value
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=log_lower_barrier_value
	#pragma HLS interface ap_none port=log_upper_barrier_value
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=log_upper_barrier_value
	#pragma HLS interface ap_none port=step_cnt
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=step_cnt
	#pragma HLS interface ap_none port=step_size
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=step_size
	#pragma HLS interface ap_none port=half_step_size
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=half_step_size
	#pragma HLS interface ap_none port=sqrt_step_size
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=sqrt_step_size
	#pragma HLS interface ap_none port=barrier_correction_factor
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=barrier_correction_factor
	#pragma HLS interface ap_none port=path_cnt
	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=path_cnt

	#pragma HLS interface ap_fifo port=gaussian_rn1
	#pragma HLS resource core=AXI4Stream variable=gaussian_rn1
	#pragma HLS interface ap_fifo port=gaussian_rn2
	#pragma HLS resource core=AXI4Stream variable=gaussian_rn2
	#pragma HLS interface ap_fifo port=prices
	#pragma HLS resource core=AXI4Stream variable=prices

	#pragma HLS resource core=AXI4LiteS metadata="-bus_bundle params" variable=return

	////////////////////////////////////////////////////////////////////////////////////////////////////////////

	state_t states[BLOCK_SIZE];
	#pragma HLS data_pack variable=states

	for (uint32_t block = 0; block < path_cnt; block += BLOCK_SIZE) {
		for (uint32_t step = 0; step != step_cnt; ++step) {
			// TODO(brugger): use data type with less bits for inner counter
			for (uint32_t i = 0; i != BLOCK_SIZE; ++i) {
				#pragma HLS PIPELINE II=1

				state_t l_state;
				// initialize
				if (step == 0) {
					l_state.stock = log_spot_price;
					l_state.vola = vola_0;
					l_state.barrier_hit = false;
				} else {
					l_state = states[i];
				}

				// calcualte next step
				state_t n_state;
				calc_t max_vola = MAX((calc_t) 0., l_state.vola);
				calc_t sqrt_vola = hls::sqrtf(max_vola);
				n_state.stock = l_state.stock + (double_riskless_rate - max_vola) *
						half_step_size + sqrt_step_size * sqrt_vola *
						gaussian_rn1.read();
				n_state.vola = l_state.vola + reversion_rate_TIMES_step_size *
//.........这里部分代码省略.........
开发者ID:jaechoon2，项目名称:finance.zynqpricer.hls，代码行数:101，代码来源:heston_kernel_sl_hls.cpp


示例20: hls_cropping_strm

void hls_cropping_strm ( hls::stream< ap_int<8> > & src,  hls::stream< ap_int<16> > & dst) {

    fstream wrapc_switch_file_token;

    wrapc_switch_file_token.open(".hls_cosim_wrapc_switch.log");

    int AESL_i;

    if (wrapc_switch_file_token.good()) {

        static unsigned AESL_transaction_pc;

        string AESL_token;

        string AESL_num;

        static AESL_FILE_HANDLER aesl_fh;

        aesl_fh.read(WRAPC_STREAM_SIZE_IN_src_V_V, AESL_token); //[[transaction]]

        aesl_fh.read(WRAPC_STREAM_SIZE_IN_src_V_V, AESL_num); //transaction number

        if (atoi(AESL_num.c_str()) == AESL_transaction_pc ) {

            aesl_fh.read(WRAPC_STREAM_SIZE_IN_src_V_V, AESL_token); //pop_size

            int aesl_tmp_1 = atoi(AESL_token.c_str());

            for (int i = 0 ; i < aesl_tmp_1  ; i++) {

                src.read();

            }

            aesl_fh.read(WRAPC_STREAM_SIZE_IN_src_V_V, AESL_token); //[[/transaction]]

        }

        int aesl_tmp_4;

        int aesl_tmp_5 = 0;

        aesl_fh.read(WRAPC_STREAM_SIZE_OUT_dst_V_V, AESL_token); //[[transaction]]

        aesl_fh.read(WRAPC_STREAM_SIZE_OUT_dst_V_V, AESL_num); //transaction number

        if (atoi(AESL_num.c_str()) == AESL_transaction_pc ) {

            aesl_fh.read(WRAPC_STREAM_SIZE_OUT_dst_V_V, AESL_token); //pop_size

            aesl_tmp_4 = atoi(AESL_token.c_str());

            aesl_fh.read(WRAPC_STREAM_SIZE_OUT_dst_V_V, AESL_token); //[[/transaction]]

        }

        std::vector<ap_int<16> > aesl_tmp_3;

        aesl_fh.read(AUTOTB_TVOUT_PC_dst_V_V, AESL_token); //[[transaction]]

        if ( AESL_token != "[[transaction]]") {

           exit(1);

        }

        aesl_fh.read(AUTOTB_TVOUT_PC_dst_V_V, AESL_num); //transaction number

        if (atoi(AESL_num.c_str()) == AESL_transaction_pc ) {

            aesl_fh.read(AUTOTB_TVOUT_PC_dst_V_V, AESL_token); //data

            std::vector < sc_bv<16> > dst_V_V_pc_buffer;

            int i = 0;

            while (AESL_token != "[[/transaction]]") {

                bool no_x = false;

                bool err = false;

                while (!no_x) {

                size_t x_found = AESL_token.find('X');

                if (x_found != string::npos) {

                    if (!err) {

                        cerr << "@W [SIM-201] RTL produces unknown value 'X' on port 'dst_V_V', possible cause: There are uninitialized variables in the C design." << endl; 

                        err = true;

                    }

                    AESL_token.replace(x_found, 1, "0");

                } else {

//.........这里部分代码省略.........
开发者ID:sriharis304，项目名称:camera_2_dmd-，代码行数:101，代码来源:apatb_hls_cropping_strm.cpp



注：本文中的hls::stream类示例由纯净天空整理自Github/MSDocs等源码及文档管理平台，相关代码片段筛选自各路编程大神贡献的开源项目，源码版权归原作者所有，传播和使用请参考对应项目的License；未经允许，请勿转载。

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