本文整理汇总了C++中rtl_efuse函数的典型用法代码示例。如果您正苦于以下问题：C++ rtl_efuse函数的具体用法？C++ rtl_efuse怎么用？C++ rtl_efuse使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了rtl_efuse函数的20个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: rtl92s_phy_rf6052_set_ccktxpower
void rtl92s_phy_rf6052_set_ccktxpower(struct ieee80211_hw *hw, u8 pwrlevel)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
u32 txagc = 0;
bool dont_inc_cck_or_turboscanoff = false;
if (((rtlefuse->eeprom_version >= 2) &&
(rtlefuse->txpwr_safetyflag == 1)) ||
((rtlefuse->eeprom_version >= 2) &&
(rtlefuse->eeprom_regulatory != 0)))
dont_inc_cck_or_turboscanoff = true;
if (mac->act_scanning) {
txagc = 0x3f;
if (dont_inc_cck_or_turboscanoff)
txagc = pwrlevel;
} else {
txagc = pwrlevel;
if (rtlpriv->dm.dynamic_txhighpower_lvl ==
TX_HIGH_PWR_LEVEL_LEVEL1)
txagc = 0x10;
else if (rtlpriv->dm.dynamic_txhighpower_lvl ==
TX_HIGH_PWR_LEVEL_LEVEL2)
txagc = 0x0;
}
if (txagc > RF6052_MAX_TX_PWR)
txagc = RF6052_MAX_TX_PWR;
rtl_set_bbreg(hw, RTXAGC_CCK_MCS32, BTX_AGCRATECCK, txagc);
}
开发者ID:303750856，项目名称:linux-3.1，代码行数:35，代码来源:rf.c
示例2: _rtl92s_write_ofdm_powerreg
static void _rtl92s_write_ofdm_powerreg(struct ieee80211_hw *hw,
u8 index, u32 val)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
u16 regoffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
u8 i, rfa_pwr[4];
u8 rfa_lower_bound = 0, rfa_upper_bound = 0, rf_pwr_diff = 0;
u32 writeval = val;
/* If path A and Path B coexist, we must limit Path A tx power.
* Protect Path B pwr over or under flow. We need to calculate
* upper and lower bound of path A tx power. */
if (rtlphy->rf_type == RF_2T2R) {
rf_pwr_diff = rtlefuse->antenna_txpwdiff[0];
/* Diff=-8~-1 */
if (rf_pwr_diff >= 8) {
/* Prevent underflow!! */
rfa_lower_bound = 0x10 - rf_pwr_diff;
/* if (rf_pwr_diff >= 0) Diff = 0-7 */
} else {
rfa_upper_bound = RF6052_MAX_TX_PWR - rf_pwr_diff;
}
}
for (i = 0; i < 4; i++) {
rfa_pwr[i] = (u8)((writeval & (0x7f << (i * 8))) >> (i * 8));
if (rfa_pwr[i] > RF6052_MAX_TX_PWR)
rfa_pwr[i] = RF6052_MAX_TX_PWR;
/* If path A and Path B coexist, we must limit Path A tx power.
* Protect Path B pwr over or under flow. We need to calculate
* upper and lower bound of path A tx power. */
if (rtlphy->rf_type == RF_2T2R) {
/* Diff=-8~-1 */
if (rf_pwr_diff >= 8) {
/* Prevent underflow!! */
if (rfa_pwr[i] < rfa_lower_bound)
rfa_pwr[i] = rfa_lower_bound;
/* Diff = 0-7 */
} else if (rf_pwr_diff >= 1) {
/* Prevent overflow */
if (rfa_pwr[i] > rfa_upper_bound)
rfa_pwr[i] = rfa_upper_bound;
}
}
}
writeval = (rfa_pwr[3] << 24) | (rfa_pwr[2] << 16) | (rfa_pwr[1] << 8) |
rfa_pwr[0];
rtl_set_bbreg(hw, regoffset[index], 0x7f7f7f7f, writeval);
}
开发者ID:303750856，项目名称:linux-3.1，代码行数:56，代码来源:rf.c
示例3: _rtl_init_mac80211
static void _rtl_init_mac80211(struct ieee80211_hw *hw)
{
struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct ieee80211_supported_band *sband;
/* <1> use mac->bands as mem for hw->wiphy->bands */
sband = &(rtlmac->bands[IEEE80211_BAND_2GHZ]);
/*
* <2> set hw->wiphy->bands[IEEE80211_BAND_2GHZ]
* to default value(1T1R)
*/
memcpy(&(rtlmac->bands[IEEE80211_BAND_2GHZ]), &rtl_band_2ghz,
sizeof(struct ieee80211_supported_band));
/* <3> init ht cap base on ant_num */
_rtl_init_hw_ht_capab(hw, &sband->ht_cap);
/* <4> set mac->sband to wiphy->sband */
hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband;
/* <5> set hw caps */
hw->flags = IEEE80211_HW_SIGNAL_DBM |
IEEE80211_HW_RX_INCLUDES_FCS |
IEEE80211_HW_BEACON_FILTER | IEEE80211_HW_AMPDU_AGGREGATION | /*PS*/
/*IEEE80211_HW_SUPPORTS_PS | */
/*IEEE80211_HW_PS_NULLFUNC_STACK | */
/*IEEE80211_HW_SUPPORTS_DYNAMIC_PS | */
IEEE80211_HW_REPORTS_TX_ACK_STATUS | 0;
hw->wiphy->interface_modes =
BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
hw->wiphy->rts_threshold = 2347;
hw->queues = AC_MAX;
hw->extra_tx_headroom = RTL_TX_HEADER_SIZE;
/* TODO: Correct this value for our hw */
/* TODO: define these hard code value */
hw->channel_change_time = 100;
hw->max_listen_interval = 5;
hw->max_rate_tries = 4;
/* hw->max_rates = 1; */
/* <6> mac address */
if (is_valid_ether_addr(rtlefuse->dev_addr)) {
SET_IEEE80211_PERM_ADDR(hw, rtlefuse->dev_addr);
} else {
u8 rtlmac[] = { 0x00, 0xe0, 0x4c, 0x81, 0x92, 0x00 };
get_random_bytes((rtlmac + (ETH_ALEN - 1)), 1);
SET_IEEE80211_PERM_ADDR(hw, rtlmac);
}
}
开发者ID:ArthySundaram，项目名称:firstrepo，代码行数:56，代码来源:base.c
示例4: _rtl92s_set_antennadiff
static void _rtl92s_set_antennadiff(struct ieee80211_hw *hw,
u8 *p_final_pwridx)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct rtl_phy *rtlphy = &(rtlpriv->phy);
char ant_pwr_diff = 0;
u32 u4reg_val = 0;
if (rtlphy->rf_type == RF_2T2R) {
ant_pwr_diff = p_final_pwridx[1] - p_final_pwridx[0];
/* range is from 7~-8,
* index = 0x0~0xf */
if (ant_pwr_diff > 7)
ant_pwr_diff = 7;
if (ant_pwr_diff < -8)
ant_pwr_diff = -8;
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
("Antenna Diff from RF-B "
"to RF-A = %d (0x%x)\n", ant_pwr_diff,
ant_pwr_diff & 0xf));
ant_pwr_diff &= 0xf;
}
/* Antenna TX power difference */
rtlefuse->antenna_txpwdiff[2] = 0;/* RF-D, don't care */
rtlefuse->antenna_txpwdiff[1] = 0;/* RF-C, don't care */
rtlefuse->antenna_txpwdiff[0] = (u8)(ant_pwr_diff); /* RF-B */
u4reg_val = rtlefuse->antenna_txpwdiff[2] << 8 |
rtlefuse->antenna_txpwdiff[1] << 4 |
rtlefuse->antenna_txpwdiff[0];
rtl_set_bbreg(hw, RFPGA0_TXGAINSTAGE, (BXBTXAGC | BXCTXAGC | BXDTXAGC),
u4reg_val);
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
("Write BCD-Diff(0x%x) = 0x%x\n",
RFPGA0_TXGAINSTAGE, u4reg_val));
}
开发者ID:303750856，项目名称:linux-3.1，代码行数:43，代码来源:rf.c
示例5: rtl_efuse
/* when we use 1 rx ant we send IEEE80211_SMPS_STATIC */
static struct sk_buff *rtl_make_smps_action(struct ieee80211_hw *hw,
enum ieee80211_smps_mode smps, u8 *da, u8 *bssid)
{
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct sk_buff *skb;
struct ieee80211_mgmt *action_frame;
/* 27 = header + category + action + smps mode */
skb = dev_alloc_skb(27 + hw->extra_tx_headroom);
if (!skb)
return NULL;
skb_reserve(skb, hw->extra_tx_headroom);
action_frame = (void *)skb_put(skb, 27);
memset(action_frame, 0, 27);
memcpy(action_frame->da, da, ETH_ALEN);
memcpy(action_frame->sa, rtlefuse->dev_addr, ETH_ALEN);
memcpy(action_frame->bssid, bssid, ETH_ALEN);
action_frame->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
IEEE80211_STYPE_ACTION);
action_frame->u.action.category = WLAN_CATEGORY_HT;
action_frame->u.action.u.ht_smps.action = WLAN_HT_ACTION_SMPS;
switch (smps) {
case IEEE80211_SMPS_AUTOMATIC:/* 0 */
case IEEE80211_SMPS_NUM_MODES:/* 4 */
WARN_ON(1);
case IEEE80211_SMPS_OFF:/* 1 */ /*MIMO_PS_NOLIMIT*/
action_frame->u.action.u.ht_smps.smps_control =
WLAN_HT_SMPS_CONTROL_DISABLED;/* 0 */
break;
case IEEE80211_SMPS_STATIC:/* 2 */ /*MIMO_PS_STATIC*/
action_frame->u.action.u.ht_smps.smps_control =
WLAN_HT_SMPS_CONTROL_STATIC;/* 1 */
break;
case IEEE80211_SMPS_DYNAMIC:/* 3 */ /*MIMO_PS_DYNAMIC*/
action_frame->u.action.u.ht_smps.smps_control =
WLAN_HT_SMPS_CONTROL_DYNAMIC;/* 3 */
break;
}
return skb;
}
开发者ID:AiWinters，项目名称:linux，代码行数:43，代码来源:base.c
示例6: rtl8723e_phy_get_power_base
static void rtl8723e_phy_get_power_base( struct ieee80211_hw *hw,
u8 *ppowerlevel, u8 channel,
u32 *ofdmbase, u32 *mcsbase )
{
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct rtl_phy *rtlphy = &rtlpriv->phy;
struct rtl_efuse *rtlefuse = rtl_efuse( rtl_priv( hw ) );
u32 powerbase0, powerbase1;
u8 legacy_pwrdiff, ht20_pwrdiff;
u8 i, powerlevel[2];
for ( i = 0; i < 2; i++ ) {
powerlevel[i] = ppowerlevel[i];
legacy_pwrdiff = rtlefuse->txpwr_legacyhtdiff[i][channel - 1];
powerbase0 = powerlevel[i] + legacy_pwrdiff;
powerbase0 = ( powerbase0 << 24 ) | ( powerbase0 << 16 ) |
( powerbase0 << 8 ) | powerbase0;
*( ofdmbase + i ) = powerbase0;
RTPRINT( rtlpriv, FPHY, PHY_TXPWR,
" [OFDM power base index rf(%c) = 0x%x]\n",
( ( i == 0 ) ? 'A' : 'B' ), *( ofdmbase + i ) );
}
for ( i = 0; i < 2; i++ ) {
if ( rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ) {
ht20_pwrdiff =
rtlefuse->txpwr_ht20diff[i][channel - 1];
powerlevel[i] += ht20_pwrdiff;
}
powerbase1 = powerlevel[i];
powerbase1 = ( powerbase1 << 24 ) |
( powerbase1 << 16 ) | ( powerbase1 << 8 ) | powerbase1;
*( mcsbase + i ) = powerbase1;
RTPRINT( rtlpriv, FPHY, PHY_TXPWR,
" [MCS power base index rf(%c) = 0x%x]\n",
( ( i == 0 ) ? 'A' : 'B' ), *( mcsbase + i ) );
}
}
开发者ID:Meticulus，项目名称:rtl8188ce-linux-driver，代码行数:41，代码来源:rf.c
示例7: _rtl92s_dm_txpowertracking_callback_thermalmeter
static void _rtl92s_dm_txpowertracking_callback_thermalmeter(
struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
u8 thermalvalue = 0;
rtlpriv->dm.txpower_trackinginit = true;
thermalvalue = (u8)rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
"eeprom_thermalmeter 0x%x\n", thermalvalue,
rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter));
if (thermalvalue) {
rtlpriv->dm.thermalvalue = thermalvalue;
rtl92s_phy_set_fw_cmd(hw, FW_CMD_TXPWR_TRACK_THERMAL);
}
rtlpriv->dm.txpowercount = 0;
}
开发者ID:andi34，项目名称:Dhollmen_Kernel，代码行数:23，代码来源:dm.c
示例8: _rtl92s_dm_txpowertracking_callback_thermalmeter
static void _rtl92s_dm_txpowertracking_callback_thermalmeter(
struct ieee80211_hw *hw )
{
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct rtl_efuse *rtlefuse = rtl_efuse( rtl_priv( hw ) );
u8 thermalvalue = 0;
u32 fw_cmd = 0;
rtlpriv->dm.txpower_trackinginit = true;
thermalvalue = ( u8 )rtl_get_rfreg( hw, RF90_PATH_A, RF_T_METER, 0x1f );
RT_TRACE( rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
"Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermal meter 0x%x\n",
thermalvalue,
rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter );
if ( thermalvalue ) {
rtlpriv->dm.thermalvalue = thermalvalue;
if ( hal_get_firmwareversion( rtlpriv ) >= 0x35 ) {
rtl92s_phy_set_fw_cmd( hw, FW_CMD_TXPWR_TRACK_THERMAL );
} else {
fw_cmd = ( FW_TXPWR_TRACK_THERMAL |
( rtlpriv->efuse.thermalmeter[0] << 8 ) |
( thermalvalue << 16 ) );
RT_TRACE( rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
"Write to FW Thermal Val = 0x%x\n", fw_cmd );
rtl_write_dword( rtlpriv, WFM5, fw_cmd );
rtl92s_phy_chk_fwcmd_iodone( hw );
}
}
rtlpriv->dm.txpowercount = 0;
}
开发者ID:OpnSrcConstruction，项目名称:rtl8188ce-linux-driver，代码行数:36，代码来源:dm.c
示例9: _rtl_init_mac80211
static void _rtl_init_mac80211(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct ieee80211_supported_band *sband;
if (rtlhal->macphymode == SINGLEMAC_SINGLEPHY && rtlhal->bandset ==
BAND_ON_BOTH) {
/* 1: 2.4 G bands */
/* <1> use mac->bands as mem for hw->wiphy->bands */
sband = &(rtlmac->bands[IEEE80211_BAND_2GHZ]);
/* <2> set hw->wiphy->bands[IEEE80211_BAND_2GHZ]
* to default value(1T1R) */
memcpy(&(rtlmac->bands[IEEE80211_BAND_2GHZ]), &rtl_band_2ghz,
sizeof(struct ieee80211_supported_band));
/* <3> init ht cap base on ant_num */
_rtl_init_hw_ht_capab(hw, &sband->ht_cap);
/* <4> set mac->sband to wiphy->sband */
hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband;
/* 2: 5 G bands */
/* <1> use mac->bands as mem for hw->wiphy->bands */
sband = &(rtlmac->bands[IEEE80211_BAND_5GHZ]);
/* <2> set hw->wiphy->bands[IEEE80211_BAND_5GHZ]
* to default value(1T1R) */
memcpy(&(rtlmac->bands[IEEE80211_BAND_5GHZ]), &rtl_band_5ghz,
sizeof(struct ieee80211_supported_band));
/* <3> init ht cap base on ant_num */
_rtl_init_hw_ht_capab(hw, &sband->ht_cap);
/* <4> set mac->sband to wiphy->sband */
hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband;
} else {
if (rtlhal->current_bandtype == BAND_ON_2_4G) {
/* <1> use mac->bands as mem for hw->wiphy->bands */
sband = &(rtlmac->bands[IEEE80211_BAND_2GHZ]);
/* <2> set hw->wiphy->bands[IEEE80211_BAND_2GHZ]
* to default value(1T1R) */
memcpy(&(rtlmac->bands[IEEE80211_BAND_2GHZ]),
&rtl_band_2ghz,
sizeof(struct ieee80211_supported_band));
/* <3> init ht cap base on ant_num */
_rtl_init_hw_ht_capab(hw, &sband->ht_cap);
/* <4> set mac->sband to wiphy->sband */
hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband;
} else if (rtlhal->current_bandtype == BAND_ON_5G) {
/* <1> use mac->bands as mem for hw->wiphy->bands */
sband = &(rtlmac->bands[IEEE80211_BAND_5GHZ]);
/* <2> set hw->wiphy->bands[IEEE80211_BAND_5GHZ]
* to default value(1T1R) */
memcpy(&(rtlmac->bands[IEEE80211_BAND_5GHZ]),
&rtl_band_5ghz,
sizeof(struct ieee80211_supported_band));
/* <3> init ht cap base on ant_num */
_rtl_init_hw_ht_capab(hw, &sband->ht_cap);
/* <4> set mac->sband to wiphy->sband */
hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband;
} else {
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Err BAND %d\n",
rtlhal->current_bandtype);
}
}
/* <5> set hw caps */
hw->flags = IEEE80211_HW_SIGNAL_DBM |
IEEE80211_HW_RX_INCLUDES_FCS |
IEEE80211_HW_AMPDU_AGGREGATION |
IEEE80211_HW_CONNECTION_MONITOR |
/* IEEE80211_HW_SUPPORTS_CQM_RSSI | */
IEEE80211_HW_REPORTS_TX_ACK_STATUS | 0;
/* swlps or hwlps has been set in diff chip in init_sw_vars */
if (rtlpriv->psc.swctrl_lps)
hw->flags |= IEEE80211_HW_SUPPORTS_PS |
IEEE80211_HW_PS_NULLFUNC_STACK |
/* IEEE80211_HW_SUPPORTS_DYNAMIC_PS | */
0;
hw->wiphy->interface_modes =
BIT(NL80211_IFTYPE_AP) |
BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_ADHOC);
hw->wiphy->rts_threshold = 2347;
hw->queues = AC_MAX;
hw->extra_tx_headroom = RTL_TX_HEADER_SIZE;
//.........这里部分代码省略.........
开发者ID:AiWinters，项目名称:linux，代码行数:101，代码来源:base.c
示例10: _rtl8723be_get_txpower_writeval_by_regulatory
static void _rtl8723be_get_txpower_writeval_by_regulatory(
struct ieee80211_hw *hw,
u8 channel, u8 index,
u32 *powerbase0,
u32 *powerbase1,
u32 *p_outwriteval )
{
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct rtl_phy *rtlphy = &( rtlpriv->phy );
struct rtl_efuse *rtlefuse = rtl_efuse( rtl_priv( hw ) );
u8 i, chnlgroup = 0, pwr_diff_limit[4], pwr_diff = 0, customer_pwr_diff;
u32 writeval, customer_limit, rf;
for ( rf = 0; rf < 2; rf++ ) {
switch ( rtlefuse->eeprom_regulatory ) {
case 0:
chnlgroup = 0;
writeval =
rtlphy->mcs_txpwrlevel_origoffset[chnlgroup][index +
( rf ? 8 : 0 )]
+ ( ( index < 2 ) ? powerbase0[rf] : powerbase1[rf] );
RTPRINT( rtlpriv, FPHY, PHY_TXPWR,
"RTK better performance, writeval(%c) = 0x%x\n",
( ( rf == 0 ) ? 'A' : 'B' ), writeval );
break;
case 1:
if ( rtlphy->pwrgroup_cnt == 1 ) {
chnlgroup = 0;
} else {
if ( channel < 3 )
chnlgroup = 0;
else if ( channel < 6 )
chnlgroup = 1;
else if ( channel < 9 )
chnlgroup = 2;
else if ( channel < 12 )
chnlgroup = 3;
else if ( channel < 14 )
chnlgroup = 4;
else if ( channel == 14 )
chnlgroup = 5;
}
writeval =
rtlphy->mcs_txpwrlevel_origoffset[chnlgroup]
[index + ( rf ? 8 : 0 )] + ( ( index < 2 ) ?
powerbase0[rf] :
powerbase1[rf] );
RTPRINT( rtlpriv, FPHY, PHY_TXPWR,
"Realtek regulatory, 20MHz, writeval(%c) = 0x%x\n",
( ( rf == 0 ) ? 'A' : 'B' ), writeval );
break;
case 2:
writeval =
( ( index < 2 ) ? powerbase0[rf] : powerbase1[rf] );
RTPRINT( rtlpriv, FPHY, PHY_TXPWR,
"Better regulatory, writeval(%c) = 0x%x\n",
( ( rf == 0 ) ? 'A' : 'B' ), writeval );
break;
case 3:
chnlgroup = 0;
if ( rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40 ) {
RTPRINT( rtlpriv, FPHY, PHY_TXPWR,
"customer's limit, 40MHz rf(%c) = 0x%x\n",
( ( rf == 0 ) ? 'A' : 'B' ),
rtlefuse->pwrgroup_ht40
[rf][channel - 1] );
} else {
RTPRINT( rtlpriv, FPHY, PHY_TXPWR,
"customer's limit, 20MHz rf(%c) = 0x%x\n",
( ( rf == 0 ) ? 'A' : 'B' ),
rtlefuse->pwrgroup_ht20
[rf][channel - 1] );
}
if ( index < 2 )
pwr_diff =
rtlefuse->txpwr_legacyhtdiff[rf][channel-1];
else if ( rtlphy->current_chan_bw ==
HT_CHANNEL_WIDTH_20 )
pwr_diff =
rtlefuse->txpwr_ht20diff[rf][channel-1];
if ( rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40 )
customer_pwr_diff =
rtlefuse->pwrgroup_ht40[rf][channel-1];
else
customer_pwr_diff =
rtlefuse->pwrgroup_ht20[rf][channel-1];
if ( pwr_diff > customer_pwr_diff )
pwr_diff = 0;
else
pwr_diff = customer_pwr_diff - pwr_diff;
//.........这里部分代码省略.........
开发者ID:Meticulus，项目名称:rtl8188ce-linux-driver，代码行数:101，代码来源:rf.c
示例11: _rtl92su_macconfig_before_fwdownload
/* mix between 8190n and r92su */
static int _rtl92su_macconfig_before_fwdownload(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
unsigned int tries = 20;
u8 tmpu1b;
u16 tmpu2b;
rtl_write_byte(rtlpriv, REG_USB_HRPWM, 0x00);
/* Prevent EFUSE leakage */
rtl_write_byte(rtlpriv, REG_EFUSE_TEST + 3, 0xb0);
msleep(20);
rtl_write_byte(rtlpriv, REG_EFUSE_TEST + 3, 0x30);
/* Set control path switch to HW control and reset digital core,
* CPU core and MAC I/O core. */
tmpu2b = rtl_read_word(rtlpriv, REG_SYS_CLKR);
if (tmpu2b & SYS_FWHW_SEL) {
tmpu2b &= ~(SYS_SWHW_SEL | SYS_FWHW_SEL);
/* Set failed, return to prevent hang. */
if (!rtl92s_halset_sysclk(hw, tmpu2b))
return -EIO;
}
rtl92s_set_mac_addr(hw, rtlefuse->dev_addr);
/* Reset MAC-IO and CPU and Core Digital BIT(10)/11/15 */
tmpu1b = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
tmpu1b &= 0x73;
rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmpu1b);
/* wait for BIT 10/11/15 to pull high automatically!! */
mdelay(1);
rtl_write_byte(rtlpriv, REG_SPS0_CTRL + 1, 0x53);
rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x57);
/* Enable AFE Macro Block's Bandgap */
tmpu1b = rtl_read_byte(rtlpriv, REG_AFE_MISC);
tmpu1b |= AFE_BGEN;
rtl_write_byte(rtlpriv, REG_AFE_MISC, tmpu1b);
mdelay(1);
/* Enable AFE Mbias */
tmpu1b = rtl_read_byte(rtlpriv, REG_AFE_MISC);
tmpu1b |= AFE_BGEN | AFE_MBEN;
rtl_write_byte(rtlpriv, REG_AFE_MISC, tmpu1b);
mdelay(1);
/* Enable LDOA15 block */
tmpu1b = rtl_read_byte(rtlpriv, REG_LDOA15_CTRL);
tmpu1b |= LDA15_EN;
rtl_write_byte(rtlpriv, REG_LDOA15_CTRL, tmpu1b);
/* Enable LDOV12D block */
tmpu1b = rtl_read_byte(rtlpriv, REG_LDOV12D_CTRL);
tmpu1b |= LDV12_EN;
rtl_write_byte(rtlpriv, REG_LDOV12D_CTRL, tmpu1b);
/* Set Digital Vdd to Retention isolation Path. */
tmpu2b = rtl_read_word(rtlpriv, REG_SYS_ISO_CTRL);
tmpu2b |= ISO_PWC_DV2RP;
rtl_write_word(rtlpriv, REG_SYS_ISO_CTRL, tmpu2b);
/* For warm reboot NIC disappear bug.
* Also known as: Engineer Packet CP test Enable */
tmpu2b = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
tmpu2b |= BIT(13);
rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, tmpu2b);
/* Support 64k IMEM */
tmpu1b = rtl_read_byte(rtlpriv, REG_SYS_ISO_CTRL + 1);
tmpu1b &= 0x68;
rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, tmpu1b);
/* Enable AFE clock source */
tmpu1b = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL);
tmpu1b |= BIT(0);
rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, tmpu1b);
/* Delay 1.5ms */
mdelay(2);
tmpu1b = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1);
tmpu1b &= ~BIT(2);
rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, tmpu1b);
/* Enable AFE PLL Macro Block *
* We need to delay 100u before enabling PLL. */
udelay(200);
tmpu1b = rtl_read_byte(rtlpriv, REG_AFE_PLL_CTRL);
tmpu1b |= BIT(0) | BIT(4);
rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, tmpu1b);
/* for divider reset
* The clock will be stable with 500us delay after the PLL reset */
udelay(500);
rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, tmpu1b | BIT(6));
//.........这里部分代码省略.........
开发者ID:ericdjobs，项目名称:rtl8192su，代码行数:101，代码来源:hw.c
示例12: _rtl92s_get_powerbase
static void _rtl92s_get_powerbase(struct ieee80211_hw *hw, u8 *p_pwrlevel,
u8 chnl, u32 *ofdmbase, u32 *mcsbase,
u8 *p_final_pwridx)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
u32 pwrbase0, pwrbase1;
u8 legacy_pwrdiff = 0, ht20_pwrdiff = 0;
u8 i, pwrlevel[4];
for (i = 0; i < 2; i++)
pwrlevel[i] = p_pwrlevel[i];
/* We only care about the path A for legacy. */
if (rtlefuse->eeprom_version < 2) {
pwrbase0 = pwrlevel[0] + (rtlefuse->legacy_httxpowerdiff & 0xf);
} else if (rtlefuse->eeprom_version >= 2) {
legacy_pwrdiff = rtlefuse->txpwr_legacyhtdiff
[RF90_PATH_A][chnl - 1];
/* For legacy OFDM, tx pwr always > HT OFDM pwr.
* We do not care Path B
* legacy OFDM pwr diff. NO BB register
* to notify HW. */
pwrbase0 = pwrlevel[0] + legacy_pwrdiff;
}
pwrbase0 = (pwrbase0 << 24) | (pwrbase0 << 16) | (pwrbase0 << 8) |
pwrbase0;
*ofdmbase = pwrbase0;
/* MCS rates */
if (rtlefuse->eeprom_version >= 2) {
/* Check HT20 to HT40 diff */
if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20) {
for (i = 0; i < 2; i++) {
/* rf-A, rf-B */
/* HT 20<->40 pwr diff */
ht20_pwrdiff = rtlefuse->txpwr_ht20diff
[i][chnl - 1];
if (ht20_pwrdiff < 8) /* 0~+7 */
pwrlevel[i] += ht20_pwrdiff;
else /* index8-15=-8~-1 */
pwrlevel[i] -= (16 - ht20_pwrdiff);
}
}
}
/* use index of rf-A */
pwrbase1 = pwrlevel[0];
pwrbase1 = (pwrbase1 << 24) | (pwrbase1 << 16) | (pwrbase1 << 8) |
pwrbase1;
*mcsbase = pwrbase1;
/* The following is for Antenna
* diff from Ant-B to Ant-A */
p_final_pwridx[0] = pwrlevel[0];
p_final_pwridx[1] = pwrlevel[1];
switch (rtlefuse->eeprom_regulatory) {
case 3:
/* The following is for calculation
* of the power diff for Ant-B to Ant-A. */
if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
p_final_pwridx[0] += rtlefuse->pwrgroup_ht40
[RF90_PATH_A][
chnl - 1];
p_final_pwridx[1] += rtlefuse->pwrgroup_ht40
[RF90_PATH_B][
chnl - 1];
} else {
p_final_pwridx[0] += rtlefuse->pwrgroup_ht20
[RF90_PATH_A][
chnl - 1];
p_final_pwridx[1] += rtlefuse->pwrgroup_ht20
[RF90_PATH_B][
chnl - 1];
}
break;
default:
break;
}
if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("40MHz finalpwr_idx "
"(A / B) = 0x%x / 0x%x\n", p_final_pwridx[0],
p_final_pwridx[1]));
} else {
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("20MHz finalpwr_idx "
"(A / B) = 0x%x / 0x%x\n", p_final_pwridx[0],
p_final_pwridx[1]));
}
}
开发者ID:303750856，项目名称:linux-3.1，代码行数:95，代码来源:rf.c
示例13: getTxPowerWriteValByRegulatory8812
void getTxPowerWriteValByRegulatory8812(
IN struct rtl_priv *rtlpriv,
IN uint8_t Channel,
IN uint8_t index,
IN u32* powerBase0,
IN u32* powerBase1,
OUT u32* pOutWriteVal
)
{
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_efuse *efuse = rtl_efuse(rtlpriv);
uint8_t i, chnlGroup=0, pwr_diff_limit[4], customer_pwr_limit;
s8 pwr_diff=0;
uint32_t writeVal, customer_limit, rf;
uint8_t Regulatory = efuse->eeprom_regulatory;
//
// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
//
for(rf=0; rf<2; rf++)
{
switch(Regulatory)
{
case 0: // Realtek better performance
// increase power diff defined by Realtek for large power
chnlGroup = 0;
//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
// chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
writeVal = rtlphy->mcs_txpwrlevel_origoffset[chnlGroup][index+(rf?8:0)] +
((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
break;
case 1: // Realtek regulatory
// increase power diff defined by Realtek for regulatory
{
if(rtlphy->pwrgroup_cnt == 1)
chnlGroup = 0;
//if(rtlphy->pwrgroup_cnt >= MAX_PG_GROUP)
{
if (Channel < 3) // Chanel 1-2
chnlGroup = 0;
else if (Channel < 6) // Channel 3-5
chnlGroup = 1;
else if(Channel <9) // Channel 6-8
chnlGroup = 2;
else if(Channel <12) // Channel 9-11
chnlGroup = 3;
else if(Channel <14) // Channel 12-13
chnlGroup = 4;
else if(Channel ==14) // Channel 14
chnlGroup = 5;
/*
if(Channel <= 3)
chnlGroup = 0;
else if(Channel >= 4 && Channel <= 9)
chnlGroup = 1;
else if(Channel > 9)
chnlGroup = 2;
if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_20)
chnlGroup++;
else
chnlGroup+=4;
*/
}
//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
//chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
writeVal = rtlphy->mcs_txpwrlevel_origoffset[chnlGroup][index+(rf?8:0)] +
((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
}
break;
case 2: // Better regulatory
// don't increase any power diff
writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
break;
default:
chnlGroup = 0;
writeVal = rtlphy->mcs_txpwrlevel_origoffset[chnlGroup][index+(rf?8:0)] +
((index<2)?powerBase0[rf]:powerBase1[rf]);
//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
break;
}
// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism.
// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
//92d do not need this
if(rtlpriv->dm.dynamic_txhighpower_lvl == TxHighPwrLevel_Level1)
writeVal = 0x14141414;
else if(rtlpriv->dm.dynamic_txhighpower_lvl == TxHighPwrLevel_Level2)
writeVal = 0x00000000;
// 20100628 Joseph: High power mode for BT-Coexist mechanism.
// This mechanism is only applied when Driver-Highpower-Mechanism is OFF.
if(rtlpriv->dm.dynamic_txhighpower_lvl == TxHighPwrLevel_BT1)
//.........这里部分代码省略.........
开发者ID:paralin，项目名称:rtl8821au-1，代码行数:101，代码来源:rf.c
示例14: _rtl92s_get_txpower_writeval_byregulatory
static void _rtl92s_get_txpower_writeval_byregulatory(struct ieee80211_hw *hw,
u8 chnl, u8 index,
u32 pwrbase0,
u32 pwrbase1,
u32 *p_outwrite_val)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
u8 i, chnlgroup, pwrdiff_limit[4];
u32 writeval, customer_limit;
/* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */
switch (rtlefuse->eeprom_regulatory) {
case 0:
/* Realtek better performance increase power diff
* defined by Realtek for large power */
chnlgroup = 0;
writeval = rtlphy->mcs_txpwrlevel_origoffset
[chnlgroup][index] +
((index < 2) ? pwrbase0 : pwrbase1);
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
("RTK better performance, "
"writeval = 0x%x\n", writeval));
break;
case 1:
/* Realtek regulatory increase power diff defined
* by Realtek for regulatory */
if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
writeval = ((index < 2) ? pwrbase0 : pwrbase1);
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
("Realtek regulatory, "
"40MHz, writeval = 0x%x\n", writeval));
} else {
if (rtlphy->pwrgroup_cnt == 1)
chnlgroup = 0;
if (rtlphy->pwrgroup_cnt >= 3) {
if (chnl <= 3)
chnlgroup = 0;
else if (chnl >= 4 && chnl <= 8)
chnlgroup = 1;
else if (chnl > 8)
chnlgroup = 2;
if (rtlphy->pwrgroup_cnt == 4)
chnlgroup++;
}
writeval = rtlphy->mcs_txpwrlevel_origoffset
[chnlgroup][index]
+ ((index < 2) ?
pwrbase0 : pwrbase1);
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
("Realtek regulatory, "
"20MHz, writeval = 0x%x\n", writeval));
}
break;
case 2:
/* Better regulatory don't increase any power diff */
writeval = ((index < 2) ? pwrbase0 : pwrbase1);
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
("Better regulatory, "
"writeval = 0x%x\n", writeval));
break;
case 3:
/* Customer defined power diff. increase power diff
defined by customer. */
chnlgroup = 0;
if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
("customer's limit, 40MHz = 0x%x\n",
rtlefuse->pwrgroup_ht40
[RF90_PATH_A][chnl - 1]));
} else {
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
("customer's limit, 20MHz = 0x%x\n",
rtlefuse->pwrgroup_ht20
[RF90_PATH_A][chnl - 1]));
}
for (i = 0; i < 4; i++) {
pwrdiff_limit[i] =
(u8)((rtlphy->mcs_txpwrlevel_origoffset
[chnlgroup][index] & (0x7f << (i * 8)))
>> (i * 8));
if (rtlphy->current_chan_bw ==
HT_CHANNEL_WIDTH_20_40) {
if (pwrdiff_limit[i] >
rtlefuse->pwrgroup_ht40
[RF90_PATH_A][chnl - 1]) {
pwrdiff_limit[i] =
rtlefuse->pwrgroup_ht20
[RF90_PATH_A][chnl - 1];
}
//.........这里部分代码省略.........
开发者ID:303750856，项目名称:linux-3.1，代码行数:101，代码来源:rf.c
示例15: _rtl_phydm_init_com_info
static int _rtl_phydm_init_com_info(struct rtl_priv *rtlpriv,
enum odm_ic_type ic_type,
struct rtl_phydm_params *params)
{
struct phy_dm_struct *dm = rtlpriv_to_phydm(rtlpriv);
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
struct rtl_phy *rtlphy = &rtlpriv->phy;
struct rtl_mac *mac = rtl_mac(rtlpriv);
struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
u8 odm_board_type = ODM_BOARD_DEFAULT;
u32 support_ability;
int i;
dm->adapter = (void *)rtlpriv;
odm_cmn_info_init(dm, ODM_CMNINFO_PLATFORM, ODM_CE);
odm_cmn_info_init(dm, ODM_CMNINFO_IC_TYPE, ic_type);
odm_cmn_info_init(dm, ODM_CMNINFO_INTERFACE, ODM_ITRF_PCIE);
odm_cmn_info_init(dm, ODM_CMNINFO_MP_TEST_CHIP, params->mp_chip);
odm_cmn_info_init(dm, ODM_CMNINFO_PATCH_ID, rtlhal->oem_id);
odm_cmn_info_init(dm, ODM_CMNINFO_BWIFI_TEST, 1);
if (rtlphy->rf_type == RF_1T1R)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
else if (rtlphy->rf_type == RF_1T2R)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
else if (rtlphy->rf_type == RF_2T2R)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
else if (rtlphy->rf_type == RF_2T2R_GREEN)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_2T2R_GREEN);
else if (rtlphy->rf_type == RF_2T3R)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_2T3R);
else if (rtlphy->rf_type == RF_2T4R)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_2T4R);
else if (rtlphy->rf_type == RF_3T3R)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_3T3R);
else if (rtlphy->rf_type == RF_3T4R)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_3T4R);
else if (rtlphy->rf_type == RF_4T4R)
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_4T4R);
else
odm_cmn_info_init(dm, ODM_CMNINFO_RF_TYPE, ODM_XTXR);
/* 1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= */
if (rtlhal->external_lna_2g != 0) {
odm_board_type |= ODM_BOARD_EXT_LNA;
odm_cmn_info_init(dm, ODM_CMNINFO_EXT_LNA, 1);
}
if (rtlhal->external_lna_5g != 0) {
odm_board_type |= ODM_BOARD_EXT_LNA_5G;
odm_cmn_info_init(dm, ODM_CMNINFO_5G_EXT_LNA, 1);
}
if (rtlhal->external_pa_2g != 0) {
odm_board_type |= ODM_BOARD_EXT_PA;
odm_cmn_info_init(dm, ODM_CMNINFO_EXT_PA, 1);
}
if (rtlhal->external_pa_5g != 0) {
odm_board_type |= ODM_BOARD_EXT_PA_5G;
odm_cmn_info_init(dm, ODM_CMNINFO_5G_EXT_PA, 1);
}
if (rtlpriv->cfg->ops->get_btc_status())
odm_board_type |= ODM_BOARD_BT;
odm_cmn_info_init(dm, ODM_CMNINFO_BOARD_TYPE, odm_board_type);
/* 1 ============== End of BoardType ============== */
odm_cmn_info_init(dm, ODM_CMNINFO_GPA, rtlhal->type_gpa);
odm_cmn_info_init(dm, ODM_CMNINFO_APA, rtlhal->type_apa);
odm_cmn_info_init(dm, ODM_CMNINFO_GLNA, rtlhal->type_glna);
odm_cmn_info_init(dm, ODM_CMNINFO_ALNA, rtlhal->type_alna);
odm_cmn_info_init(dm, ODM_CMNINFO_RFE_TYPE, rtlhal->rfe_type);
odm_cmn_info_init(dm, ODM_CMNINFO_EXT_TRSW, 0);
/*Add by YuChen for kfree init*/
odm_cmn_info_init(dm, ODM_CMNINFO_REGRFKFREEENABLE, 2);
odm_cmn_info_init(dm, ODM_CMNINFO_RFKFREEENABLE, 0);
/*Antenna diversity relative parameters*/
odm_cmn_info_hook(dm, ODM_CMNINFO_ANT_DIV,
&rtlefuse->antenna_div_cfg);
odm_cmn_info_init(dm, ODM_CMNINFO_RF_ANTENNA_TYPE,
rtlefuse->antenna_div_type);
odm_cmn_info_init(dm, ODM_CMNINFO_BE_FIX_TX_ANT, 0);
odm_cmn_info_init(dm, ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH, 0);
/* (8822B) efuse 0x3D7 & 0x3D8 for TX PA bias */
odm_cmn_info_init(dm, ODM_CMNINFO_EFUSE0X3D7, params->efuse0x3d7);
odm_cmn_info_init(dm, ODM_CMNINFO_EFUSE0X3D8, params->efuse0x3d8);
/*Add by YuChen for adaptivity init*/
odm_cmn_info_hook(dm, ODM_CMNINFO_ADAPTIVITY,
&rtlpriv->phydm.adaptivity_en);
//.........这里部分代码省略.........
开发者ID:AlexShiLucky，项目名称:linux，代码行数:101，代码来源:rtl_phydm.c
示例16: rtl_proc_add_one
void rtl_proc_add_one( struct ieee80211_hw *hw )
{
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct rtl_efuse *rtlefuse = rtl_efuse( rtl_priv( hw ) );
// struct proc_dir_entry *entry; // remove after fixing these TODOs
snprintf( rtlpriv->dbg.proc_name, 18, "%x-%x-%x-%x-%x-%x",
rtlefuse->dev_addr[0], rtlefuse->dev_addr[1],
rtlefuse->dev_addr[2], rtlefuse->dev_addr[3],
rtlefuse->dev_addr[4], rtlefuse->dev_addr[5] );
return; // remove after fixing these TODOs
/* TODO: create_proc_entry is deprecated and has been removed from the kernel.
* Need to use it's replacement
rtlpriv->dbg.proc_dir = create_proc_entry( rtlpriv->dbg.proc_name,
S_IFDIR | S_IRUGO | S_IXUGO, proc_topdir );
if ( !rtlpriv->dbg.proc_dir ) {
RT_TRACE( COMP_INIT, DBG_EMERG, ( "Unable to init "
"/proc/net/%s/%s\n", rtlpriv->cfg->name,
rtlpriv->dbg.proc_name ) );
return;
}
* TODO: create_proc_read_entry is deprecated and has been removed from the kernel.
* Need to use it's replacement
entry = create_proc_read_entry( "mac-0", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_mac_0, hw );
if ( !entry )
RT_TRACE( COMP_INIT, DBG_EMERG, ( "Unable to initialize "
"/proc/net/%s/%s/mac-0\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "mac-1", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_mac_1, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/mac-1\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "mac-2", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_mac_2, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/mac-2\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "mac-3", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_mac_3, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/mac-3\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "mac-4", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_mac_4, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/mac-4\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "mac-5", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_mac_5, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/mac-5\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "mac-6", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_mac_6, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/mac-6\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "mac-7", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_mac_7, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/mac-7\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "bb-8", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_bb_8, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/bb-8\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "bb-9", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_bb_9, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/bb-9\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name ) );
entry = create_proc_read_entry( "bb-a", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, rtl_proc_get_bb_a, hw );
if ( !entry )
RT_TRACE( COMP_INIT, COMP_ERR, ( "Unable to initialize "
"/proc/net/%s/%s/bb-a\n",
//.........这里部分代码省略.........
开发者ID:jrosco，项目名称:rtl8188ce-linux-driver，代码行数:101，代码来源:debug.c
示例17: rtl_proc_add_one
void rtl_proc_add_one(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct proc_dir_entry *entry;
snprintf(rtlpriv->dbg.proc_name, 18, "%x-%x-%x-%x-%x-%x",
rtlefuse->dev_addr[0], rtlefuse->dev_addr[1],
rtlefuse->dev_addr[2], rtlefuse->dev_addr[3],
rtlefuse->dev_addr[4], rtlefuse->dev_addr[5]);
rtlpriv->dbg.proc_dir = proc_mkdir(rtlpriv->dbg.proc_name, proc_topdir);
if (!rtlpriv->dbg.proc_dir) {
RT_TRACE(COMP_INIT, DBG_EMERG, ("Unable to init "
"/proc/net/%s/%s\n", rtlpriv->cfg->name,
rtlpriv->dbg.proc_name));
return;
}
entry = proc_create_data("mac-0", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, &file_ops_mac_0, hw);
if (!entry)
RT_TRACE(COMP_INIT, DBG_EMERG,
("Unable to initialize /proc/net/%s/%s/mac-0\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name));
entry = proc_create_data("mac-1", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, &file_ops_mac_1, hw);
if (!entry)
RT_TRACE(COMP_INIT, COMP_ERR,
("Unable to initialize /proc/net/%s/%s/mac-1\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name));
entry = proc_create_data("mac-2", S_IFREG | S_IRUGO,
rtlpriv->dbg.proc_dir, &file_ops_mac_2, hw);
if (!entry)
RT_TRACE(COMP_INIT, COMP_ERR,
("Unable to initialize /proc/net/%s/%s/mac-2\n",
rtlpriv->cfg->name, rtlpriv->dbg.proc_name));
entry = proc_
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