void hang (void)
{
	disable_interrupts ();
	puts("### ERROR ### Please reset board ###\n");
	for (;;);
}

int flash_erase (flash_info_t *info, int s_first, int s_last)
{
	volatile ulong addr = info->start[0];
	int flag, prot, sect, l_sect;
	ulong start, now, last;

	flash_to_xd();

	if (s_first < 0 || s_first > s_last) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf ("- missing\n");
		} else {
			printf ("- no sectors to erase\n");
		}
		flash_to_mem();
		return 1;
	}

	if (info->flash_id == FLASH_UNKNOWN) {
		printf ("Can't erase unknown flash type %08lx - aborted\n",
			info->flash_id);
		flash_to_mem();
		return 1;
	}

	prot = 0;
	for (sect=s_first; sect<=s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n",
			prot);
	} else {
		printf ("");
	}

	l_sect = -1;

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts();

	out8(addr + 0x555, 0xAA);
	iobarrier_rw();
	out8(addr + 0x2AA, 0x55);
	iobarrier_rw();
	out8(addr + 0x555, 0x80);
	iobarrier_rw();
	out8(addr + 0x555, 0xAA);
	iobarrier_rw();
	out8(addr + 0x2AA, 0x55);
	iobarrier_rw();

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect<=s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			addr = info->start[sect];
			out8(addr, 0x30);
			iobarrier_rw();
			l_sect = sect;
		}
	}

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts();

	/* wait at least 80us - let's wait 1 ms */
	udelay (1000);

	/*
	 * We wait for the last triggered sector
	 */
	if (l_sect < 0)
		goto DONE;

	start = get_timer (0);
	last  = start;
	addr = info->start[l_sect];

	DEBUGF ("Start erase timeout: %d\n", CONFIG_SYS_FLASH_ERASE_TOUT);

	while ((in8(addr) & 0x80) != 0x80) {
		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
			printf ("Timeout\n");
			flash_reset (info->start[0]);
			flash_to_mem();
			return 1;
		}
		/* show that we're waiting */
		if ((now - last) > 1000) {	/* every second */
			putc ('.');
			last = now;
		}
		iobarrier_rw();
	}

DONE:
//.........这里部分代码省略.........

int cpu_post_test_twox (void)
{
    int ret = 0;
    unsigned int i, reg;
    int flag = disable_interrupts();

    for (i = 0; i < cpu_post_twox_size && ret == 0; i++)
    {
	struct cpu_post_twox_s *test = cpu_post_twox_table + i;

	for (reg = 0; reg < 32 && ret == 0; reg++)
	{
	    unsigned int reg0 = (reg + 0) % 32;
	    unsigned int reg1 = (reg + 1) % 32;
	    unsigned int stk = reg < 16 ? 31 : 15;
	    unsigned long code[] =
	    {
		ASM_STW(stk, 1, -4),
		ASM_ADDI(stk, 1, -16),
		ASM_STW(3, stk, 8),
		ASM_STW(reg0, stk, 4),
		ASM_STW(reg1, stk, 0),
		ASM_LWZ(reg0, stk, 8),
		ASM_11X(test->cmd, reg1, reg0),
		ASM_STW(reg1, stk, 8),
		ASM_LWZ(reg1, stk, 0),
		ASM_LWZ(reg0, stk, 4),
		ASM_LWZ(3, stk, 8),
		ASM_ADDI(1, stk, 16),
		ASM_LWZ(stk, 1, -4),
		ASM_BLR,
	    };
	    unsigned long codecr[] =
	    {
		ASM_STW(stk, 1, -4),
		ASM_ADDI(stk, 1, -16),
		ASM_STW(3, stk, 8),
		ASM_STW(reg0, stk, 4),
		ASM_STW(reg1, stk, 0),
		ASM_LWZ(reg0, stk, 8),
		ASM_11X(test->cmd, reg1, reg0) | BIT_C,
		ASM_STW(reg1, stk, 8),
		ASM_LWZ(reg1, stk, 0),
		ASM_LWZ(reg0, stk, 4),
		ASM_LWZ(3, stk, 8),
		ASM_ADDI(1, stk, 16),
		ASM_LWZ(stk, 1, -4),
		ASM_BLR,
	    };
	    ulong res;
	    ulong cr;

	    if (ret == 0)
	    {
		cr = 0;
		cpu_post_exec_21 (code, & cr, & res, test->op);

		ret = res == test->res && cr == 0 ? 0 : -1;

		if (ret != 0)
		{
	            post_log ("Error at twox test %d !\n", i);
		}
	    }

	    if (ret == 0)
	    {
		cpu_post_exec_21 (codecr, & cr, & res, test->op);

		ret = res == test->res &&
		      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;

		if (ret != 0)
		{
	            post_log ("Error at twox test %d !\n", i);
	        }
	    }
	}
    }

    if (flag)
	enable_interrupts();

    return ret;
}

/*
 * void cpu_reboot(int howto, char *bootstr)
 *
 * Reboots the system
 *
 * Deal with any syncing, unmounting, dumping and shutdown hooks,
 * then reset the CPU.
 */
void
cpu_reboot(int howto, char *bootstr)
{
	u_int32_t reg;

#ifdef DIAGNOSTIC
	/* info */
	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
#endif

	/*
	 * If we are still cold then hit the air brakes
	 * and crash to earth fast
	 */
	if (cold) {
		doshutdownhooks();
		printf("The operating system has halted.\n");
		printf("Please press any key to reboot.\n\n");
		cngetc();
		printf("rebooting...\n");
		goto reset;
	}

	/* Disable console buffering */

	/*
	 * If RB_NOSYNC was not specified sync the discs.
	 * Note: Unless cold is set to 1 here, syslogd will die during the
	 * unmount.  It looks like syslogd is getting woken up only to find
	 * that it cannot page part of the binary in as the filesystem has
	 * been unmounted.
	 */
	if (!(howto & RB_NOSYNC))
		bootsync();

	/* Say NO to interrupts */
	splhigh();

	/* Do a dump if requested. */
	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
		dumpsys();
	
	/* Run any shutdown hooks */
	doshutdownhooks();

	/* Make sure IRQ's are disabled */
	IRQdisable;

	if (howto & RB_HALT) {
		printf("The operating system has halted.\n");
		printf("Please press any key to reboot.\n\n");
		cngetc();
	}

	printf("rebooting...\n\r");
 reset:
	/*
	 * Make really really sure that all interrupts are disabled,
	 */
	(void) disable_interrupts(I32_bit|F32_bit);
	IXPREG(IXP425_INT_ENABLE) = 0;

	/*
	 * Map the boot Flash device down at physical address 0.
	 * This is safe since NetBSD runs out of an alias of
	 * SDRAM at 0x10000000.
	 */
	reg = EXP_CSR_READ_4(ixpsip_softc, EXP_CNFG0_OFFSET);
	reg |= EXP_CNFG0_MEM_MAP;
	EXP_CSR_WRITE_4(ixpsip_softc, EXP_CNFG0_OFFSET, reg);

	/*
	 * Jump into the bootcode's reset vector
	 *
	 * XXX:
	 * Redboot doesn't like the state in which we leave the PCI
	 * ethernet card, and so fails to detect it on reboot. This
	 * pretty much necessitates a hard reset/power cycle to be
	 * able to download a new kernel image over ethernet.
	 *
	 * I suspect this is due to a bug in Redboot's i82557 driver.
	 */
	cpu_reset();

	/* ...and if that didn't work, just croak. */
	printf("RESET FAILED!\n");
	for (;;);
}

int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	ulong		iflag;
	ulong		load_end = 0;
	int		ret;
	boot_os_fn	*boot_fn;
#ifdef CONFIG_NEEDS_MANUAL_RELOC
	static int relocated = 0;

	/* relocate boot function table */
	if (!relocated) {
		int i;
		for (i = 0; i < ARRAY_SIZE(boot_os); i++)
			if (boot_os[i] != NULL)
				boot_os[i] += gd->reloc_off;
		relocated = 1;
	}
#endif

	/* determine if we have a sub command */
	if (argc > 1) {
		char *endp;

		simple_strtoul(argv[1], &endp, 16);
		/* endp pointing to NULL means that argv[1] was just a
		 * valid number, pass it along to the normal bootm processing
		 *
		 * If endp is ':' or '#' assume a FIT identifier so pass
		 * along for normal processing.
		 *
		 * Right now we assume the first arg should never be '-'
		 */
		if ((*endp != 0) && (*endp != ':') && (*endp != '#'))
			return do_bootm_subcommand(cmdtp, flag, argc, argv);
	}

	if (bootm_start(cmdtp, flag, argc, argv))
		return 1;

	/*
	 * We have reached the point of no return: we are going to
	 * overwrite all exception vector code, so we cannot easily
	 * recover from any failures any more...
	 */
	iflag = disable_interrupts();

#if defined(CONFIG_CMD_USB)
	/*
	 * turn off USB to prevent the host controller from writing to the
	 * SDRAM while Linux is booting. This could happen (at least for OHCI
	 * controller), because the HCCA (Host Controller Communication Area)
	 * lies within the SDRAM and the host controller writes continously to
	 * this area (as busmaster!). The HccaFrameNumber is for example
	 * updated every 1 ms within the HCCA structure in SDRAM! For more
	 * details see the OpenHCI specification.
	 */
	usb_stop();
#endif

	ret = bootm_load_os(images.os, &load_end, 1);

	if (ret < 0) {
		if (ret == BOOTM_ERR_RESET)
			do_reset(cmdtp, flag, argc, argv);
		if (ret == BOOTM_ERR_OVERLAP) {
			if (images.legacy_hdr_valid) {
				image_header_t *hdr;
				hdr = &images.legacy_hdr_os_copy;
				if (image_get_type(hdr) == IH_TYPE_MULTI)
					puts("WARNING: legacy format multi "
						"component image "
						"overwritten\n");
			} else {
				puts("ERROR: new format image overwritten - "
					"must RESET the board to recover\n");
				bootstage_error(BOOTSTAGE_ID_OVERWRITTEN);
				do_reset(cmdtp, flag, argc, argv);
			}
		}
		if (ret == BOOTM_ERR_UNIMPLEMENTED) {
			if (iflag)
				enable_interrupts();
			bootstage_error(BOOTSTAGE_ID_DECOMP_UNIMPL);
			return 1;
		}
	}

	lmb_reserve(&images.lmb, images.os.load, (load_end - images.os.load));

	if (images.os.type == IH_TYPE_STANDALONE) {
		if (iflag)
			enable_interrupts();
		/* This may return when 'autostart' is 'no' */
		bootm_start_standalone(iflag, argc, argv);
		return 0;
	}

	bootstage_mark(BOOTSTAGE_ID_CHECK_BOOT_OS);

#ifdef CONFIG_SILENT_CONSOLE
//.........这里部分代码省略.........

void disable_interrupts_int_serial(void) {
    disable_interrupts();
}

int cpu_post_test_b (void)
{
    int ret = 0;
    unsigned int i;
    int flag = disable_interrupts();

    if (ret == 0)
    {
	ulong code[] =
	{
	   ASM_MFLR(4),
	   ASM_MTLR(3),
	   ASM_B(4),
	   ASM_MFLR(3),
	   ASM_MTLR(4),
	   ASM_BLR,
	};
	ulong res;

	cpu_post_exec_11 (code, &res, 0);

	ret = res == 0 ? 0 : -1;

	if (ret != 0)
	{
	    post_log ("Error at b1 test !\n");
	}
    }

    if (ret == 0)
    {
	ulong code[] =
	{
	   ASM_MFLR(4),
	   ASM_MTLR(3),
	   ASM_BL(4),
	   ASM_MFLR(3),
	   ASM_MTLR(4),
	   ASM_BLR,
	};
	ulong res;

	cpu_post_exec_11 (code, &res, 0);

	ret = res == (ulong)code + 12 ? 0 : -1;

	if (ret != 0)
	{
	    post_log ("Error at b2 test !\n");
	}
    }

    if (ret == 0)
    {
	ulong cc, cd;
	int cond;
	ulong ctr;
	int link;

	i = 0;

	for (cc = 0; cc < 4 && ret == 0; cc++)
	{
	    for (cd = 0; cd < 4 && ret == 0; cd++)
	    {
		for (link = 0; link <= 1 && ret == 0; link++)
		{
		    for (cond = 0; cond <= 1 && ret == 0; cond++)
		    {
			for (ctr = 1; ctr <= 2 && ret == 0; ctr++)
			{
			    int decr = cd < 2;
			    int cr = cond ? 0x80000000 : 0x00000000;
			    int jumpc = cc >= 2 ||
					(cc == 0 && !cond) ||
					(cc == 1 && cond);
			    int jumpd = cd >= 2 ||
					(cd == 0 && ctr != 1) ||
					(cd == 1 && ctr == 1);
			    int jump = jumpc && jumpd;

			    ret = cpu_post_test_bc (link ? OP_BCL : OP_BC,
				(cc << 3) + (cd << 1), 0, jump, decr, link,
				ctr, cr);

			    if (ret != 0)
			    {
				post_log ("Error at b3 test %d !\n", i);
			    }

			    i++;
			}
		    }
		}
	    }
	}
    }

    if (flag)
	enable_interrupts();
//.........这里部分代码省略.........

void main(void)
{
  UINT8 i = 0;
  UINT8 a = 0;
  INT8 s6 = 0;
  INT8 c6 = 0;
  INT8 dd = 0;

  disable_interrupts();
  cpu_fast();// GBC
  enable_interrupts();

  mode(M_DRAWING);
  color(3, 0, SOLID);

  set_bkg_palette(0, 1, palette);

  plot_heart(12, 30);
  plot_heart(22, 26);

  for (i = 0; i != 8; i++)
  {
    pixels[i].x = HX;
    pixels[i].y = HY;
  }

  while (1)
  {
    INT8 xmin = pixels[0].x;
    INT8 xmax = pixels[0].x;
    INT8 ymin = pixels[0].y;
    INT8 ymax = pixels[0].y;

    // calc min-max of last drawn cube
    for (i = 1; i != 8; i++)
    {
      pixel_t * p = pixels + i;
      if (xmin > p->x)
          xmin = p->x;
      else if (xmax < p->x)
          xmax = p->x;
      if (ymin < p->y)
          ymin = p->y;
      else if (ymax > p->y)
          ymax = p->y;
    }

    // step
    s6 = sin6[a];
    c6 = cos6[a];
    dd = s6 + s6;
    a += 3;

    // transform and project
    for (i = 0; i != 8; i++)
    {
      vertex_t * v = vertices + i;
      pixel_t * p = pixels + i;

      INT8 x = (v->x * c6) + (v->z * s6) + dd;
      INT8 y = (v->y * 31) + dd;
      INT8 z = (v->z * c6) - (v->x * s6);

      /* rotates in z
      INT8 x = (v->x * c6) - (v->y * s6);
      INT8 y = (v->y * c6) + (v->x * s6);
      INT8 z = (v->z * 31);
      */

      UINT16 dx = x < 0 ? -x : x;
      UINT16 dy = y < 0 ? -y : y;
      UINT16 dz = 128 - z;

      dx = (dx << 5) / dz;
      dy = (dy << 5) / dz;

      p->x = HX + (x < 0 ? -dx : dx);
      p->y = HY + (y < 0 ? -dy : dy);
    }

    // sync
    //wait_vbl_done();

    // draw wireframe
    color(WHITE, WHITE, SOLID);
    box(xmin - 1, ymin + 1, xmax + 1, ymax - 1, M_FILL);

    color(1, 0, SOLID);
    for (i = 0; i != 12; i++)
    {
      edge_t * edge = edges + i;
      pixel_t * p0 = pixels + edge->i;
      pixel_t * p1 = pixels + edge->j;

      if (p0->x > p1->x)
        line(p1->x, p1->y, p0->x, p0->y);
      else
        line(p0->x, p0->y, p1->x, p1->y);
    }
  }
//.........这里部分代码省略.........

/**
 * Hauptfunktion. Wird als erstes aufgerufen.
 * Struktogramm:
 * <img src="../../Spielablauf_Struktogramm.png">
 * @return gibt 0 zurück
 */
int main()
{
	init_graphics();		//Function um Grafik Lib zu initialisieren, gibt evtl später mal Errorcode zurück...
    init_counter();

    /**
     * \todo UART Interrupts funktionieren noch nicht.
     * Als Workaround wird nun alle 1ms im Timer-Interrupt-Handler die UART1 Schnittstelle gepollt. <br>
     */
    init_uart();

    init_genrand(GUI_GetTime());

    while(1)
    {
    	init_game();
    	init_level();

    	// warten bis eine taste gedrückt wird, welche den initialen Zustand von snake_direction ändert
    	snake_direction = '?';
		while(snake_direction == '?');

		// jetzt food zeichnen
		food = randomize_food();
		draw_food(food);

		enable_interrupts();

		do
		{
			switch(step_forward(check_initial_state()))
			{
			case COLLISION:
				game_over = 1;
				disable_interrupts();
				//write_byte(score);

				FFLCR &= ~(1<<7);			// DLAB löschen für zugriff
				while (!(FFLSR & (1<<5)));	// Solange UART Busy
				FFTHR = score;

				enable_interrupts();
				break;

			case FOOD:
				score++;
				if(size >= 15)
				{
					// wenn Länge = 15: Level-Up
					score += 10;
					level++;
					init_level();
				}
				food = randomize_food();
				disable_interrupts();
				draw_food(food);
				enable_interrupts();
				break;

			case NOTHING:
				break;
			}

			delay(delay_time);
		}
		while(game_over != 1);
    }

    return 0;
}

/*
 * void cpu_reboot(int howto, char *bootstr)
 *
 * Reboots the system
 *
 * Deal with any syncing, unmounting, dumping and shutdown hooks,
 * then reset the CPU.
 */
void
cpu_reboot(int howto, char *bootstr)
{

	/*
	 * If we are still cold then hit the air brakes
	 * and crash to earth fast
	 */
	if (cold) {
		*(volatile uint8_t *)HDLG_LEDCTRL |= LEDCTRL_STAT_RED;
		howto |= RB_HALT;
		goto haltsys;
	}

	/* Disable console buffering */

	/*
	 * If RB_NOSYNC was not specified sync the discs.
	 * Note: Unless cold is set to 1 here, syslogd will die during the
	 * unmount.  It looks like syslogd is getting woken up only to find
	 * that it cannot page part of the binary in as the filesystem has
	 * been unmounted.
	 */
	if ((howto & RB_NOSYNC) == 0) {
		bootsync();
		/*resettodr();*/
	}

	/* wait 1s */
	delay(1 * 1000 * 1000);

	/* Say NO to interrupts */
	splhigh();

	/* Do a dump if requested. */
	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) {
		dumpsys();
	}

haltsys:
	/* Run any shutdown hooks */
	doshutdownhooks();

	/* Make sure IRQ's are disabled */
	IRQdisable;

	if (howto & RB_HALT) {
		*(volatile uint8_t *)HDLG_PWRMNG = PWRMNG_POWOFF;
		delay(3 * 1000 * 1000);	/* wait 3s */

		printf("SHUTDOWN FAILED!\n");
		printf("The operating system has halted.\n");
		printf("Please press any key to reboot.\n\n");
		cngetc();
	}

	printf("rebooting...\n\r");

	(void)disable_interrupts(I32_bit|F32_bit);
	cpu_idcache_wbinv_all();
	cpu_drain_writebuf();

	*(volatile uint8_t *)HDLG_PWRMNG = PWRMNG_RESET;
	delay(1 * 1000 * 1000);	/* wait 1s */

	/* ...and if that didn't work, just croak. */
	printf("RESET FAILED!\n");
	for (;;) {
		continue;
	}
}

//.........这里部分代码省略.........
   /////////////////////QUARTO RENATA///////////////
   //
   // INPUTS 
   // 0,1 cozinha
   // 2,3 quarto
   //
   // OUTPUTS
   // 5 quarto renata economica
   // 6 janela hologeneo
   // 7 entrada
   // 2 cozinha fluorescente
   // 3 cima balcao halogeneo
   // 4 divisoria halogeneo
   // 10 balcao baixo verde
   // 11 balcao cima verde
   // 12 balcao cima vermelho
   // 13 balcao cima azul
   // 14 balcao baixo azul
   // 15 balcao baixo vermelho
   //INPUT INIT
   eeprom_on_off_init(60,61,0);//on_adr off_adr real_btn interruptor cozinha 1
   eeprom_on_off_init(62,63,1);//on_adr off_adr real_btn interruptor cozinha 2  
// eeprom_dimmer_init(68,62,63,1);//dim_adr on_adr off_adr
   eeprom_on_off_init(64,65,2);//on_adr off_adr real_btn interruptor quarto renata 1
//   eeprom_on_off_init(66,67,3);//on_adr off_adr real_btn interruptor quarto renata 2  
   eeprom_dimmer_init(68,66,67,3);//dim_adr on_adr off_adr
  
   //OUTPUT INIT
   unsigned int on_adr[8]={60,255,255,255,255,255,255,255};
   unsigned int off_adr[8]={61,10,255,255,255,255,255,255};
   unsigned int dim_adr[8]={68,255,255,255,255,255,255,255};
   eeprom_onOff_out_init(on_adr,off_adr,2); //luz cozinha fluorescente
   on_adr[0]=62;
   off_adr[0]=63;
   eeprom_onOff_out_init(on_adr,off_adr,3); //luz cozinha cima balcao halogeneo
   eeprom_onOff_out_init(on_adr,off_adr,4); //luz cozinha divisoria
   eeprom_onOff_out_init(on_adr,off_adr,15); //luz balcao baixo vermelho
   eeprom_onOff_out_init(on_adr,off_adr,12); //luz balcao cima vermelho
   //eeprom_dimmer_out_init(dim_adr,on_adr,off_adr,3); //luz cozinha cima balcao halogeneo
   //eeprom_dimmer_out_init(dim_adr,on_adr,off_adr,4); //luz cozinha divisoria
   //eeprom_dimmer_out_init(dim_adr,on_adr,off_adr,15); //luz cozinha divisoria
   
   on_adr[0]=64;
   off_adr[0]=65;
   eeprom_onOff_out_init(on_adr,off_adr,5); //luz quarto renata economica
   on_adr[0]=66;
   off_adr[0]=67;
  // eeprom_onOff_out_init(on_adr,off_adr,7); //luz quarto renata entrada
  // eeprom_onOff_out_init(on_adr,off_adr,6); //luz quarto renata janela
   eeprom_dimmer_out_init(dim_adr,on_adr,off_adr,7); //luz quarto renata entrada
   eeprom_dimmer_out_init(dim_adr,on_adr,off_adr,6); //luz quarto renata janela
   
  
   readDevices();
#ifdef DEBUG  
    printf("inputs:%d outputs:%d %d %d\n\r",mydevices.numberOfInputs,mydevices.numberOfOutputs,((struct outputs)mydevices.myoutputs[0]).type,((struct outputs)mydevices.myoutputs[1]).type);
#endif
   dimmer_outputs_init();
   // printf("start %Lu %Lu %Lu\n\r",fpointer(N_LUZES,0),delays1[N_LUZES][0],delays2[N_LUZES][0]); 
   /*((struct light)mydevices.myoutputs[0].device).dim_value.value=50;
   ((struct light)mydevices.myoutputs[0].device).dim_value.needs_update=true;
   ((struct light)mydevices.myoutputs[0].device).off.value=1;
   ((struct light)mydevices.myoutputs[0].device).off.needs_update=true;
 */
 
   write_outputs();
// printf("start %Lu\n\r",fpointer(N_LUZES,0)); 
 interrupts_enable();

   while(true){
   restart_wdt();
   if(syncError || oscError)
   {  
      ++ledErrorCounter;
      if(ledErrorCounter>1000)
      {
         output_toggle(LED);
         ledErrorCounter=0;
      }
   }
#ifdef DEBUG
   if(kbhit())
   {
      setup_wdt(WDT_OFF);
      disable_interrupts (GLOBAL) ;
      goDebug();
   }
#endif
   process_outpoints();
   write_outputs();
   if(secondFlag)
   {
      secondFlag=false;
      processTimedEvents();
      if(!syncError && !oscError) output_toggle(LED);
   }
  // print_inputs(false);
  
}
}

/* TODO: 2x16 unsupported */
int
flash_erase (flash_info_t *info, int s_first, int s_last)
{
	volatile unsigned char *addr = (uchar *)(info->start[0]);
	int flag, prot, sect, l_sect;
	ulong start, now, last;

	/* TODO: 2x16 unsupported */
	if(info->portwidth==4) return 1;

	if((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM) return 1;
	if((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
	    for (sect = s_first; sect<=s_last; sect++) {
		int sector_size=info->size/info->sector_count;
		addr = (uchar *)(info->start[sect]);
		memset((void *)addr, 0, sector_size);
	    }
	    return 0;
	}

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf ("- missing\n");
		} else {
			printf ("- no sectors to erase\n");
		}
		return 1;
	}

	if ((info->flash_id&FLASH_VENDMASK) == FLASH_MAN_INTEL)  {
		return flash_erase_intel(info,
				(unsigned short)s_first,
				(unsigned short)s_last);
	}

#if 0
	if ((info->flash_id == FLASH_UNKNOWN) ||
	    (info->flash_id > FLASH_AMD_COMP)) {
		printf ("Can't erase unknown flash type %08lx - aborted\n",
			info->flash_id);
		return 1;
	}
#endif

	prot = 0;
	for (sect=s_first; sect<=s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n",
			prot);
	} else {
		printf ("\n");
	}

	l_sect = -1;

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts();

	flash_cmd(info->portwidth,addr,0x555,0xAA);
	flash_cmd(info->portwidth,addr,0x2AA,0x55);
	flash_cmd(info->portwidth,addr,0x555,0x80);
	flash_cmd(info->portwidth,addr,0x555,0xAA);
	flash_cmd(info->portwidth,addr,0x2AA,0x55);

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect<=s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			addr = (uchar *)(info->start[sect]);
			flash_cmd(info->portwidth,addr,0,0x30);
			l_sect = sect;
		}
	}

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts();

	/* wait at least 80us - let's wait 1 ms */
	udelay (1000);

	/*
	 * We wait for the last triggered sector
	 */
	if (l_sect < 0)
		goto DONE;

	start = get_timer (0);
	last  = start;
	addr = (volatile unsigned char *)(info->start[l_sect]);
	/* broken for 2x16: TODO */
	while ((addr[0] & 0x80) != 0x80) {
		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
			printf ("Timeout\n");
			return 1;
//.........这里部分代码省略.........

static int32
timer_thread(void *cookie)
{
	status_t status = 0;

	do {
		bigtime_t timeout;
		bigtime_t now;
		cpu_status cpu;
		timer_function func;
		void * cookie;
		int i;
		int index;

		cpu = disable_interrupts();
		acquire_spinlock(&sTimerSpinlock);

		now = system_time();
		cookie = 0;
		func = 0;
				
		// find timer with smallest event time
		index = -1;
		timeout = B_INFINITE_TIMEOUT;
		for (i = 0; i < sTimerCount; i++) {
			if (sTimerData[i].next_event < timeout) {
				timeout = sTimerData[i].next_event;
				index = i;
			}
		}
		
		if (timeout < now) {
			// timer is ready for execution, load func and cookie
			ASSERT(index >= 0 && index < sTimerCount);
			func = sTimerData[index].func;
			cookie = sTimerData[index].cookie;
			if (sTimerData[index].periodic) {
				// periodic timer is ready, update the entry
				sTimerData[index].next_event += sTimerData[index].interval;
			} else {
				// single shot timer is ready, delete the entry
				if (index != (sTimerCount - 1) && sTimerCount != 1) {
					memcpy(&sTimerData[index], &sTimerData[sTimerCount - 1], sizeof(struct timer_info));
				}
				sTimerCount--;
			}
		}

		release_spinlock(&sTimerSpinlock);
		restore_interrupts(cpu);
		
		// execute timer hook
		if (timeout < now) {
			ASSERT(func);
			func(cookie);
			continue;
		}

		status = acquire_sem_etc(sTimerSem, 1, B_ABSOLUTE_TIMEOUT, timeout);
	} while (status != B_BAD_SEM_ID);

	return 0;
}

int cpu_post_test_load (void)
{
    int ret = 0;
    unsigned int i;
    int flag = disable_interrupts();

    for (i = 0; i < cpu_post_load_size && ret == 0; i++)
    {
	struct cpu_post_load_s *test = cpu_post_load_table + i;
	uchar data[16] =
	{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
	ulong base0 = (ulong) (data + 8);
	ulong base = base0;
	ulong value;

	if (test->index)
	{
	    ulong code[] =
	    {
		ASM_12(test->cmd, 5, 3, 4),
		ASM_BLR,
	    };

	    cpu_post_exec_22w (code, &base, test->offset, &value);
	}
	else
	{
	    ulong code[] =
	    {
		ASM_11I(test->cmd, 4, 3, test->offset),
		ASM_BLR,
	    };

	    cpu_post_exec_21w (code, &base, &value);
	}

	if (ret == 0)
	{
	   if (test->update)
	       ret = base == base0 + test->offset ? 0 : -1;
	   else
	       ret = base == base0 ? 0 : -1;
	}

	if (ret == 0)
	{
	    switch (test->width)
	    {
	    case 1:
		ret = *(uchar *)(base0 + test->offset) == value ?
		      0 : -1;
		break;
	    case 2:
		ret = *(ushort *)(base0 + test->offset) == value ?
		      0 : -1;
		break;
	    case 3:
		ret = *(short *)(base0 + test->offset) == value ?
		      0 : -1;
		break;
	    case 4:
		ret = *(ulong *)(base0 + test->offset) == value ?
		      0 : -1;
		break;
	    }
	}

	if (ret != 0)
	{
	    post_log ("Error at load test %d !\n", i);
	}
    }

    if (flag)
	enable_interrupts();

    return ret;
}

//.........这里部分代码省略.........
		TRACE("init timer\n");
		timer_init(&sKernelArgs);
		TRACE("init real time clock\n");
		rtc_init(&sKernelArgs);
		timer_init_post_rtc();

		TRACE("init condition variables\n");
		condition_variable_init();

		// now we can create and use semaphores
		TRACE("init VM semaphores\n");
		vm_init_post_sem(&sKernelArgs);
		TRACE("init generic syscall\n");
		generic_syscall_init();
		smp_init_post_generic_syscalls();
		TRACE("init scheduler\n");
		scheduler_init();
		TRACE("init threads\n");
		thread_init(&sKernelArgs);
		TRACE("init kernel daemons\n");
		kernel_daemon_init();
		arch_platform_init_post_thread(&sKernelArgs);

		TRACE("init I/O interrupts\n");
		int_init_io(&sKernelArgs);
		TRACE("init VM threads\n");
		vm_init_post_thread(&sKernelArgs);
		low_resource_manager_init_post_thread();
		TRACE("init DPC\n");
		dpc_init();
		TRACE("init VFS\n");
		vfs_init(&sKernelArgs);
#if ENABLE_SWAP_SUPPORT
		TRACE("init swap support\n");
		swap_init();
#endif
		TRACE("init POSIX semaphores\n");
		realtime_sem_init();
		xsi_sem_init();
		xsi_msg_init();

		// Start a thread to finish initializing the rest of the system. Note,
		// it won't be scheduled before calling scheduler_start() (on any CPU).
		TRACE("spawning main2 thread\n");
		thread_id thread = spawn_kernel_thread(&main2, "main2",
			B_NORMAL_PRIORITY, NULL);
		resume_thread(thread);

		// We're ready to start the scheduler and enable interrupts on all CPUs.
		scheduler_enable_scheduling();

		// bring up the AP cpus in a lock step fashion
		TRACE("waking up AP cpus\n");
		sCpuRendezvous = sCpuRendezvous2 = 0;
		smp_wake_up_non_boot_cpus();
		smp_cpu_rendezvous(&sCpuRendezvous); // wait until they're booted

		// exit the kernel startup phase (mutexes, etc work from now on out)
		TRACE("exiting kernel startup\n");
		gKernelStartup = false;

		smp_cpu_rendezvous(&sCpuRendezvous2);
			// release the AP cpus to go enter the scheduler

		TRACE("starting scheduler on cpu 0 and enabling interrupts\n");
		scheduler_start();
		enable_interrupts();
	} else {
		// lets make sure we're in sync with the main cpu
		// the boot processor has probably been sending us
		// tlb sync messages all along the way, but we've
		// been ignoring them
		arch_cpu_global_TLB_invalidate();

		// this is run for each non boot processor after they've been set loose
		smp_per_cpu_init(&sKernelArgs, currentCPU);

		// wait for all other AP cpus to get to this point
		smp_cpu_rendezvous(&sCpuRendezvous);
		smp_cpu_rendezvous(&sCpuRendezvous2);

		// welcome to the machine
		scheduler_start();
		enable_interrupts();
	}

#ifdef TRACE_BOOT
	// We disable interrupts for this dprintf(), since otherwise dprintf()
	// would acquires a mutex, which is something we must not do in an idle
	// thread, or otherwise the scheduler would be seriously unhappy.
	disable_interrupts();
	TRACE("main: done... begin idle loop on cpu %d\n", currentCPU);
	enable_interrupts();
#endif

	for (;;)
		cpu_idle();

	return 0;
}

status_t 
ice1712_buffer_exchange(ice1712 *card, multi_buffer_info *data)
{
	int cpu_status = 0, status;
/*	unsigned char peak[MAX_ADC];
	int i;
*/
//	TRACE("Avant Exchange p : %d, r : %d\n", data->playback_buffer_cycle, data->record_buffer_cycle);

	status = acquire_sem_etc(card->buffer_ready_sem, 1, B_RELATIVE_TIMEOUT | B_CAN_INTERRUPT, 50000);
	switch (status) {
		case B_NO_ERROR:
//			TRACE("B_NO_ERROR\n");
			cpu_status  = disable_interrupts();

			// Playback buffers info
			data->played_real_time		= card->played_time;
			data->played_frames_count	= card->frames_count;
			data->playback_buffer_cycle	= (card->buffer - 1) % SWAPPING_BUFFERS; //Buffer played

			// Record buffers info
			data->recorded_real_time	= card->played_time;
			data->recorded_frames_count	= card->frames_count;
			data->record_buffer_cycle	= (card->buffer - 1) % SWAPPING_BUFFERS; //Buffer filled

			data->flags = B_MULTI_BUFFER_PLAYBACK | B_MULTI_BUFFER_RECORD;

			restore_interrupts(cpu_status);
			break;

		case B_BAD_SEM_ID:
			TRACE("B_BAD_SEM_ID\n");
			break;

		case B_INTERRUPTED:
			TRACE("B_INTERRUPTED\n");
			break;

		case B_BAD_VALUE:
			TRACE("B_BAD_VALUE\n");
			break;

		case B_WOULD_BLOCK:
			TRACE("B_WOULD_BLOCK\n");
			break;

		case B_TIMED_OUT:
			TRACE("B_TIMED_OUT\n");
			start_DMA(card);

			cpu_status = lock();

			data->played_real_time = card->played_time;
			data->playback_buffer_cycle	= 0;
			data->played_frames_count += card->buffer_size;

			data->recorded_real_time = card->played_time;
			data->record_buffer_cycle = 0;
			data->recorded_frames_count	+= card->buffer_size;
			data->flags = B_MULTI_BUFFER_PLAYBACK | B_MULTI_BUFFER_RECORD;

			unlock(cpu_status);
			break;

		default:
			TRACE("Default\n");
			break;
	}

	if ((card->buffer % 1500) == 0) {
		uint8 reg8, reg8_dir;
		reg8 = read_gpio(card);
		reg8_dir = read_cci_uint8(card, CCI_GPIO_DIRECTION_CONTROL);
		TRACE("DEBUG === GPIO = %d (dir %d)\n", reg8, reg8_dir);
		
		reg8 = spdif_read(card, CS84xx_VERSION_AND_CHIP_ID);
		TRACE("DEBUG === S/PDif Version : 0x%x\n", reg8);
	}

	return B_OK;
}

static int flash_erase_16(flash_info_t * info, int s_first, int s_last)
{
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
	int flag, prot, sect;

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN)
			printf("- missing\n");
		else
			printf("- no sectors to erase\n");
		return 1;
	}

	if (info->flash_id == FLASH_UNKNOWN) {
		printf("Can't erase unknown flash type - aborted\n");
		return 1;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect])
			prot++;
	}

	if (prot)
		printf("- Warning: %d protected sectors will not be erased!",	prot);

	printf("\n");

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts();

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect <= s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);

			addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xAA00AA00;
			addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55005500;
			addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x80008000;
			addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xAA00AA00;
			addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55005500;
			addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x30003000;	/* sector erase */

			/*
			 * Wait for each sector to complete, it's more
			 * reliable.  According to AMD Spec, you must
			 * issue all erase commands within a specified
			 * timeout.  This has been seen to fail, especially
			 * if printf()s are included (for debug)!!
			 */
			wait_for_DQ7_16(info, sect);
		}
	}

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts();

	/* wait at least 80us - let's wait 1 ms */
	udelay(1000);

	/* reset to read mode */
	addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
	addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xF000F000;	/* reset bank */

	printf(" done\n");
	return 0;
}

void watchdog_reset(void)
{
	int re_enable = disable_interrupts();
	reset_4xx_watchdog();
	if (re_enable) enable_interrupts();
}

int flash_erase(flash_info_t * info, int s_first, int s_last)
{
	vu_char *addr = (vu_char *) (info->start[0]);
	int flag, prot, sect, l_sect;
	ulong start, now, last;

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf("- missing\n");
		} else {
			printf("- no sectors to erase\n");
		}
		return 1;
	}

	if ((info->flash_id == FLASH_UNKNOWN) ||
	    (info->flash_id > FLASH_AMD_COMP)) {
		printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id);
		return 1;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf("- Warning: %d protected sectors will not be erased!\n", prot);
	} else {
		printf("\n");
	}

	l_sect = -1;

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts();

	addr[0x0555] = 0xAA;
	addr[0x02AA] = 0x55;
	addr[0x0555] = 0x80;
	addr[0x0555] = 0xAA;
	addr[0x02AA] = 0x55;

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect <= s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			addr = (vu_char *) (info->start[sect]);
			addr[0] = 0x30;
			l_sect = sect;
		}
	}

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts();

	/* wait at least 80us - let's wait 1 ms */
	udelay(1000);

	/*
	 * We wait for the last triggered sector
	 */
	if (l_sect < 0)
		goto DONE;

	start = get_timer(0);
	last = start;
	addr = (vu_char *) (info->start[l_sect]);
	while ((addr[0] & 0x80) != 0x80) {
		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
			printf("Timeout\n");
			return 1;
		}
		/* show that we're waiting */
		if ((now - last) > 1000) {	/* every second */
			putc('.');
			last = now;
		}
	}

DONE:
	/* reset to read mode */
	addr = (vu_char *) info->start[0];
	addr[0] = 0xF0;				/* reset bank */

	printf(" done\n");
	return 0;
}

void PwmMngr::init(void)
{
	uint8_t timers = 0;

	// discover which timers must be configured
	for(int b = 0; b < BoosterMngr::nboosters; b++)
		timers |= get_timer(BoosterMngr::boosters[b].pwmSignalPin);

	// CONFIGURE TIMERS
	disable_interrupts();
#ifndef SIMULATOR
	if(timers & (1 << 1)) {
		// timer 1
		TCCR1A = (TCCR1A & 0b00001100)
			              // 0b00______ Normal port operation, OC1A disconnected
			              // 0b__00____ Normal port operation, OC1B disconnected
			              // 0b____**__ Reserved
			| 0b00000001; // 0b______01 Fast PWM 8-bit (!WGM13, WGM12, !WGM11, WGM10)
		TCCR1B = (TCCR1B & 0b11100000)
			              // 0b***_____ ICNC1, ICES1, Reserved
			| 0b00001000  // 0b___01___ Fast PWM 8-bit (!WGM13, WGM12, !WGM11, WGM10)
			| 0x04;       // 0b_____100 clock prescaler 0x04 (16e6/256 = 62.5 khz)
		TIMSK1 &= 0b11011000; // disable all timer 1 interrupts
		                      // 0b**_**___ Reserved
				      // 0b__0_____ input capture interrupt enable
				      // 0b_____0__ OCIE1B: output compare B match interrupt enable
				      // 0b______0_ OCIE1A: output compare A match i