C++ dev_find_device函数代码示例

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本文整理汇总了C++中dev_find_device函数的典型用法代码示例。如果您正苦于以下问题：C++ dev_find_device函数的具体用法？C++ dev_find_device怎么用？C++ dev_find_device使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。

在下文中一共展示了dev_find_device函数的20个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于我们的系统推荐出更棒的C++代码示例。

示例1: ctrl_init

static void ctrl_init(struct device *dev)
{
	/*
	 * TODO: Fix some ordering issue for V-link set Rx77[6] and
	 * PCI1_Rx4F[0] should to 1.
	 * FIXME DO you need?
	 */

	/*
	 * VT8237R specific configuration. Other SB are done in their own
	 * directories. TODO: Add A version.
	 */
	device_t devsb = dev_find_device(PCI_VENDOR_ID_VIA,
					 PCI_DEVICE_ID_VIA_VT8237S_LPC, 0);
	if (devsb) {
		vt8237s_vlink_init(dev);
	}

	devsb = dev_find_device(PCI_VENDOR_ID_VIA,
				PCI_DEVICE_ID_VIA_VT8237A_LPC, 0);
	if (devsb) {
		vt8237a_vlink_init(dev);
	}

	/* Configure PCI1 and copy mirror registers from D0F3. */
	vt8237_cfg(dev);
	dump_south(dev);
}

开发者ID:andy737，项目名称:firebrickRemote，代码行数:28，代码来源:ctrl.c

示例2: vt8237_cfg

static void vt8237_cfg(struct device *dev)
{
	u8 regm, regm3;
	device_t devfun3;

	devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
				  PCI_DEVICE_ID_VIA_K8T800_DRAM, 0);
	if (!devfun3)
		devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8M800_DRAM, 0);
	if (!devfun3)
	  devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
				    PCI_DEVICE_ID_VIA_K8T890CE_3, 0);
	if (!devfun3)
		devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8M890CE_3, 0);
	if (!devfun3)
		devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
					  PCI_DEVICE_ID_VIA_K8T890CF_3, 0);
	if (!devfun3)
		die("Unknown NB");

	/* CPU to PCI Flow Control 1 & 2, just fill in recommended. */
	pci_write_config8(dev, 0x70, 0xc2);
	pci_write_config8(dev, 0x71, 0xc8);

	/* PCI Control */
	pci_write_config8(dev, 0x72, 0xee);
	pci_write_config8(dev, 0x73, 0x01);
	pci_write_config8(dev, 0x74, 0x3c);
	pci_write_config8(dev, 0x75, 0x0f);
	pci_write_config8(dev, 0x76, 0x50);
	pci_write_config8(dev, 0x77, 0x48);
	pci_write_config8(dev, 0x78, 0x01);
	/* APIC on HT */
	/* Maybe Enable LDT APIC Mode bit3 set to 1 */
	pci_write_config8(dev, 0x7c, 0x77);

	/* WARNING: Need to copy some registers from NB (D0F3) to SB (D11F7). */

	regm = pci_read_config8(devfun3, 0x88);	/* Shadow mem CTRL */
	pci_write_config8(dev, 0x57, regm);

	regm = pci_read_config8(devfun3, 0x80);	/* Shadow page C */
	pci_write_config8(dev, 0x61, regm);

	regm = pci_read_config8(devfun3, 0x81);	/* Shadow page D */
	pci_write_config8(dev, 0x62, regm);

	/* Shadow page F + memhole copy */
	regm = pci_read_config8(devfun3, 0x83);
	pci_write_config8(dev, 0x63, regm);

	// FIXME is this really supposed to be regm3?
	regm3 = pci_read_config8(devfun3, 0x82);/* Shadow page E */
	pci_write_config8(dev, 0x64, regm);

	regm = pci_read_config8(devfun3, 0x86);	/* SMM and APIC decoding */
	pci_write_config8(dev, 0xe6, regm);
}

开发者ID:andy737，项目名称:firebrickRemote，代码行数:60，代码来源:ctrl.c

示例3: vt8237r_cfg

static void vt8237r_cfg(struct device *dev, struct device *devsb)
{
	u8 regm, regm3;

	device_t devfun3;

	devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
					   PCI_DEVICE_ID_VIA_K8T890CE_3, 0);

		if (!devfun3)
			devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
					   PCI_DEVICE_ID_VIA_K8M890CE_3, 0);

	pci_write_config8(dev, 0x70, 0xc2);

	/* PCI Control */
	pci_write_config8(dev, 0x72, 0xee);
	pci_write_config8(dev, 0x73, 0x01);
	pci_write_config8(dev, 0x74, 0x24);
	pci_write_config8(dev, 0x75, 0x0f);
	pci_write_config8(dev, 0x76, 0x50);
	pci_write_config8(dev, 0x77, 0x08);
	pci_write_config8(dev, 0x78, 0x01);
	/* APIC on HT */
	pci_write_config8(dev, 0x7c, 0x7f);
	pci_write_config8(dev, 0x7f, 0x02);

	/* WARNING: Need to copy some registers from NB (D0F3) to SB (D0F7). */

	regm = pci_read_config8(devfun3, 0x88);	/* Shadow mem CTRL */
	pci_write_config8(dev, 0x57, regm);

	regm = pci_read_config8(devfun3, 0x80);	/* Shadow page C */
	pci_write_config8(dev, 0x61, regm);

	regm = pci_read_config8(devfun3, 0x81);	/* Shadow page D */
	pci_write_config8(dev, 0x62, regm);

	regm = pci_read_config8(devfun3, 0x86);	/* SMM and APIC decoding */
	pci_write_config8(dev, 0xe6, regm);

	regm3 = pci_read_config8(devfun3, 0x82);/* Shadow page E */

	/*
	 * All access bits for 0xE0000-0xEFFFF encode as just 2 bits!
	 * So the NB reg is quite inconsistent, we expect there only 0xff or 0x00,
	 * and write them to 0x63 7-6 but! VIA 8237A has the mirror at 0x64!
	 */
	if (regm3 == 0xff)
		regm3 = 0xc0;
	else
		regm3 = 0x0;

	/* Shadow page F + memhole copy */
	regm = pci_read_config8(devfun3, 0x83);
	pci_write_config8(dev, 0x63, regm3 | (regm & 0x3F));
}

开发者ID:kelsieflynn，项目名称:coreboot-1，代码行数:57，代码来源:k8t890_ctrl.c

示例4: uart_mem_init

u32 uart_mem_init(void)
{
	unsigned uart_baud = CONFIG_TTYS0_BAUD;
	u32 uart_bar = 0;
	unsigned div;

	/* find out the correct baud rate */
#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
	static const unsigned baud[8] = { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 };
	unsigned b_index = 0;
#if defined(__PRE_RAM__)
	b_index = read_option(baud_rate, 0);
	b_index &= 7;
	uart_baud = baud[b_index];
#else
	if (get_option(&b_index, "baud_rate") == CB_SUCCESS)
		uart_baud = baud[b_index];
#endif
#endif

	/* Now find the UART base address and calculate the divisor */
#if CONFIG_DRIVERS_OXFORD_OXPCIE

#if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__)
	device_t dev = dev_find_device(0x1415, 0xc158, NULL);
	if (!dev)
		dev = dev_find_device(0x1415, 0xc11b, NULL);

	if (dev) {
		struct resource *res = find_resource(dev, 0x10);

		if (res) {
			uart_bar = res->base + 0x1000; // for 1st UART
			// uart_bar = res->base + 0x2000; // for 2nd UART
		}
	}

	if (!uart_bar)
#endif
	uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART
	// uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART

	div = 4000000 / uart_baud;
#endif

	if (uart_bar)
		uart8250_mem_init(uart_bar, div);

	return uart_bar;
}

开发者ID:mytbk，项目名称:coreboot，代码行数:50，代码来源:uart8250mem.c

示例5: write_protect_vgabios

static void write_protect_vgabios(void)
{
	device_t dev;

	printk(BIOS_DEBUG, "write_protect_vgabios\n");

	dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3324, 0);
	if (dev)
		pci_write_config8(dev, 0x80, 0xff);

	dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x7324, 0);
	if (dev)
		pci_write_config8(dev, 0x61, 0xff);
}

开发者ID:AdriDlu，项目名称:coreboot，代码行数:14，代码来源:vga.c

示例6: acpi_fill_mcfg

unsigned long acpi_fill_mcfg(unsigned long current)
{
	device_t dev;
	u32 pciexbar = 0;
	u32 pciexbar_reg;
	int max_buses;
	int pci_dev_id;

	for (pci_dev_id = PCI_DEVICE_ID_RG_MIN; pci_dev_id <= PCI_DEVICE_ID_RG_MAX; pci_dev_id++) {
		dev = dev_find_device(PCI_VENDOR_ID_INTEL, pci_dev_id, 0);
		if (dev)
			break;
	}

	if (!dev)
		return current;

	pciexbar_reg = sideband_read(B_UNIT, BECREG);

	/* MMCFG not supported or not enabled. */
	if (!(pciexbar_reg & (1 << 0)))
		return current;

	/* 256MB ECAM range */
	pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28));
	max_buses = 256;

	current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current,
			pciexbar, 0x0, 0x0, max_buses - 1);

	return current;
}

开发者ID:bitpick，项目名称:coreboot，代码行数:32，代码来源:acpi.c

示例7: init

static void init(struct device *dev)
{
	unsigned int gpio_base, i;
	printk(BIOS_DEBUG, "LiPPERT LiteRunner-LX ENTER %s\n", __func__);

	/* Init CS5536 GPIOs */
	gpio_base = pci_read_config32(dev_find_device(PCI_VENDOR_ID_AMD,
		    PCI_DEVICE_ID_AMD_CS5536_ISA, 0), PCI_BASE_ADDRESS_1) - 1;

	outl(0x00000040, gpio_base + 0x00); // GPIO6  value      1 - LAN_PD#
	outl(0x00000040, gpio_base + 0x04); // GPIO6  output     1 - LAN_PD#
	outl(0x04000000, gpio_base + 0x18); // GPIO10 pull up    0 - THRM_ALRM#
	outl(0x00000400, gpio_base + 0x34); // GPIO10 in aux1    1 - THRM_ALRM#
	outl(0x00000400, gpio_base + 0x20); // GPIO10 input      1 - THRM_ALRM#
	outl(0x00000800, gpio_base + 0x94); // GPIO27 out aux2   1 - 32kHz
	outl(0x00000800, gpio_base + 0x84); // GPIO27 output     1 - 32kHz
	outl(0x08000000, gpio_base + 0x98); // GPIO27 pull up    0 - 32kHz

	/* Init Environment Controller. */
	for (i = 0; i < ARRAY_SIZE(ec_init_table); i++) {
		u16 val = ec_init_table[i];
		outb((u8)val, 0x0295);
		outb(val >> 8, 0x0296);
	}

	/* bit2 = RS485_EN2, bit1 = RS485_EN1, bit0 = Live LED */
	outb(SIO_GP1X_CONFIG, 0x1220); /* Simple-I/O GP17-10 */
	/* bit1 = COM3_RX_EN, bit0 = COM3_TX_EN */
	outb(SIO_GP2X_CONFIG, 0x1221); /* Simple-I/O GP27-20 */

	printk(BIOS_DEBUG, "LiPPERT LiteRunner-LX EXIT %s\n", __func__);
}

开发者ID:lynxis，项目名称:coreboot-signed，代码行数:32，代码来源:mainboard.c

示例8: init

static void init(struct device *dev)
{
	unsigned int gpio_base, i;
	printk(BIOS_DEBUG, "LiPPERT Hurricane-LX ENTER %s\n", __func__);

	/* Init CS5536 GPIOs */
	gpio_base = pci_read_config32(dev_find_device(PCI_VENDOR_ID_AMD,
		    PCI_DEVICE_ID_AMD_CS5536_ISA, 0), PCI_BASE_ADDRESS_1) - 1;

	outl(0x00000040, gpio_base + 0x00); // GPIO6  value      1 - LAN_PD#
	outl(0x00000040, gpio_base + 0x08); // GPIO6  open drain 1 - LAN_PD# (jumpered GPIO per default)
	outl(0x00000040, gpio_base + 0x04); // GPIO6  output     1 - LAN_PD#
	outl(0x00000400, gpio_base + 0x34); // GPIO10 in aux1    1 - THRM_ALRM#
	outl(0x00000400, gpio_base + 0x20); // GPIO10 input      1 - THRM_ALRM#
#if !CONFIG_BOARD_OLD_REVISION
	outl(0x00000800, gpio_base + 0x94); // GPIO27 out aux2   1 - 32kHz
	outl(0x00000800, gpio_base + 0x84); // GPIO27 output     1 - 32kHz
#endif
	outl(0x08000000, gpio_base + 0x98); // GPIO27 pull up    0 - 32kHz (new) / PM-LED (old)

	/* Init Environment Controller. */
	for (i = 0; i < ARRAY_SIZE(ec_init_table); i++) {
		u16 val = ec_init_table[i];
		outb((u8)val, 0x0295);
		outb(val >> 8, 0x0296);
	}

	/* bit2 = RS485_EN2, bit1 = RS485_EN1 */
	outb(SIO_GP1X_CONFIG, 0x1220); /* Simple-I/O GP17-10 */

	printk(BIOS_DEBUG, "LiPPERT Hurricane-LX EXIT %s\n", __func__);
}

开发者ID:RafaelRMachado，项目名称:Coreboot，代码行数:32，代码来源:mainboard.c

示例9: set_led

void set_led(void)
{
	// set power led to steady now that coreboot has virtually done its job
	device_t dev;
	dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0);
	pci_write_config8(dev, 0x94, 0xb0);
}

开发者ID:andy737，项目名称:firebrickRemote，代码行数:7，代码来源:vt8235.c

示例10: vt8237_ide_80pin_detect

u32 vt8237_ide_80pin_detect(struct device *dev)
{
	device_t lpc_dev;
	u16 acpi_io_base;
	u32 gpio_in;
	u32 res;

	lpc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
				PCI_DEVICE_ID_VIA_VT8237A_LPC, 0);
	if (!lpc_dev)
		return 0;

	acpi_io_base = pci_read_config16(lpc_dev, 0x88);
	if (!acpi_io_base || (acpi_io_base & ~1) == 0)
		return 0;
	acpi_io_base &= ~1;

	gpio_in = inl(acpi_io_base + 0x48);
	/* bit 9 for primary port, clear if unconnected or 80-pin cable */
	res  = gpio_in & (1<<9) ? 0 : VT8237R_IDE0_80PIN_CABLE;
	/* bit 4 for secondary port, clear if unconnected or 80-pin cable */
	res |= gpio_in & (1<<4) ? 0 : VT8237R_IDE1_80PIN_CABLE;

	printk(BIOS_INFO, "Cable on %s PATA port: %d pin\n", "primary",
		gpio_in & (1<<9) ? 40 : 80);
	printk(BIOS_INFO, "Cable on %s PATA port: %d pin\n", "secondary",
		gpio_in & (1<<4) ? 40 : 80);

	return res;
}

开发者ID:cristim，项目名称:coreboot，代码行数:30，代码来源:mainboard.c

示例11: acpi_fill_mcfg

unsigned long acpi_fill_mcfg(unsigned long current)
{
	device_t dev;
	u32 pciexbar = 0;
	u32 pciexbar_reg;
	int max_buses;

	dev = dev_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_SB, 0);
	if (!dev)
		dev = dev_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_IB, 0);
	if (!dev)
		return current;

	pciexbar_reg=pci_read_config32(dev, PCIEXBAR);

	// MMCFG not supported or not enabled.
	if (!(pciexbar_reg & (1 << 0)))
		return current;

	switch ((pciexbar_reg >> 1) & 3) {
	case 0: // 256MB
		pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28));
		max_buses = 256;
		break;
	case 1: // 128M
		pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27));
		max_buses = 128;
		break;
	case 2: // 64M
		pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)|(1 << 26));
		max_buses = 64;
		break;
	default: // RSVD
		return current;
	}

	if (!pciexbar)
		return current;

	current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current,
			pciexbar, 0x0, 0x0, max_buses - 1);

	return current;
}

开发者ID:DarkDefender，项目名称:coreboot，代码行数:44，代码来源:acpi.c

示例12: get_memory_size

static unsigned long get_memory_size(void)
{
	device_t nb_dev;
	u8 size;

	nb_dev = dev_find_device(PCI_VENDOR_ID_RDC,
				 PCI_DEVICE_ID_RDC_R8610_NB, 0);
	size = pci_read_config8(nb_dev, 0x6d) & 0xf;
	return (2 * 1024) << size;
}

开发者ID:MikeeHawk，项目名称:coreboot，代码行数:10，代码来源:northbridge.c

示例13: acpi_fill_mcfg

unsigned long acpi_fill_mcfg(unsigned long current)
{
	device_t dev;
	struct resource *res;

	dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_K8T890CE_5, 0);
	if (!dev)
		dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_K8T890CF_5, 0);
	if (!dev)
		dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_K8M890CE_5, 0);
	if (!dev)
		return current;

	res = find_resource(dev, K8T890_MMCONFIG_MBAR);
	if (res) {
		current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)
				current, res->base, 0x0, 0x0, 0xff);
	}
	return current;
}

开发者ID:RafaelRMachado，项目名称:Coreboot，代码行数:20，代码来源:traf_ctrl.c

示例14: pirq_assign_irqs

void pirq_assign_irqs(const unsigned char pIntAtoD[4])
{
	device_t pdev;

	pdev = dev_find_device(PCI_VENDOR_ID_AMD,
			       PCI_DEVICE_ID_AMD_CS5536_ISA, 0);

	if (pdev) {
		pci_write_config16(pdev, 0x5c, (pIntAtoD[3] << 12
			| pIntAtoD[2] << 8 | pIntAtoD[1] << 4 | pIntAtoD[0]));
	}
}

开发者ID:lynxis，项目名称:coreboot-signed，代码行数:12，代码来源:pirq.c

示例15: pirq_assign_irqs

void pirq_assign_irqs(const unsigned char pIntAtoD[4])
{
	device_t pdev;

	pdev = dev_find_device(PCI_VENDOR_ID_CYRIX,
			       PCI_DEVICE_ID_CYRIX_5530_LEGACY, 0);

	if (pdev) {
		pci_write_config8(pdev, 0x5c, (pIntAtoD[1] << 4 | pIntAtoD[0]));
		pci_write_config8(pdev, 0x5d, (pIntAtoD[3] << 4 | pIntAtoD[2]));
	}
}

开发者ID:0ida，项目名称:coreboot，代码行数:12，代码来源:pirq.c

示例16: pci_domain_set_resources

static void pci_domain_set_resources(device_t dev)
{
	device_t mc_dev;
	u32 pci_tolm;
	unsigned char reg;
	unsigned long tomk, tolmk;
	unsigned char rambits;
	int idx;

	pci_tolm = find_pci_tolm(dev->link_list);
	mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3324, 0);

	rambits = pci_read_config8(mc_dev, 0x88);
	rambits >>= 2;

	/* Get memory size and frame buffer from northbridge's registers.
	 *
	 * If register contains an invalid value we set frame buffer size to a
	 * default of 32M, but that probably won't happen.
	 */
	reg = pci_read_config8(mc_dev, 0xa1);
	reg &= 0x70;
	reg = reg >> 4;

	/* TOP 1M SMM Memory */
	if (reg == 0x0 || reg == 0x6 || reg == 0x7)
		tomk = (((rambits << 6) - 32 - 1) * 1024);	// Set frame buffer 32M for default
	else
		tomk = (((rambits << 6) - (4 << reg) - 1) * 1024);

	/* Compute the top of Low memory */
	tolmk = pci_tolm >> 10;
	if (tolmk >= tomk) {
		/* The PCI hole does does not overlap the memory. */
		tolmk = tomk;
		tolmk -= 1024;	// TOP 1M SM Memory
	}

#if CONFIG_WRITE_HIGH_TABLES == 1
	high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
	high_tables_size = HIGH_MEMORY_SIZE;
	printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
						tomk*1024, high_tables_base, high_tables_size);
#endif

	/* Report the memory regions */
	idx = 10;

	/* TODO: Hole needed? Should this go elsewhere? */
	ram_resource(dev, idx++, 0, 640);	/* first 640k */
	ram_resource(dev, idx++, 768, (tolmk - 768));	/* leave a hole for vga */
	assign_resources(dev->link_list);
}

开发者ID:XVilka，项目名称:coreboot，代码行数:53，代码来源:northbridge.c

示例17: variant_mainboard_final

void variant_mainboard_final(void)
{
	struct device *dev;
	uint16_t cmd = 0;

	/* Set Master Enable for on-board PCI device. */
	dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0);
	if (dev) {
		cmd = pci_read_config16(dev, PCI_COMMAND);
		cmd |= PCI_COMMAND_MASTER;
		pci_write_config16(dev, PCI_COMMAND, cmd);
	}
}

开发者ID:canistation，项目名称:coreboot，代码行数:13，代码来源:mainboard.c

示例18: pirq_assign_irqs

void pirq_assign_irqs(const unsigned char route[4])
{
	device_t pdev;

	pdev = dev_find_device(PCI_VENDOR_ID_VIA,
				PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
	if (!pdev)
		pdev = dev_find_device(PCI_VENDOR_ID_VIA,
				PCI_DEVICE_ID_VIA_VT8237S_LPC, 0);
	if (!pdev)
		pdev = dev_find_device(PCI_VENDOR_ID_VIA,
				PCI_DEVICE_ID_VIA_VT8237A_LPC, 0);
	if (!pdev)
		return;

	pci_write_config8(pdev, 0x55,  route[0] << 4);
	pci_write_config8(pdev, 0x56, (route[2] << 4) | route[1]);
	pci_write_config8(pdev, 0x57,  route[3] << 4);

	/* Enable INT[E-H] mapped to INT[A-D] for simplicity */
	pci_write_config8(pdev, 0x46,  0x00);
}

开发者ID:RafaelRMachado，项目名称:Coreboot，代码行数:22，代码来源:pirq.c

示例19: mainboard_init

static void mainboard_init(device_t dev)
{
	char **vpd_region_ptr = NULL;
	u32 search_length = find_fmap_entry("RO_VPD", (void **)vpd_region_ptr);
	u32 search_address = (unsigned long)(*vpd_region_ptr);
	u16 io_base = 0;
	struct device *ethernet_dev = NULL;

	/* Initialize the Embedded Controller */
	butterfly_ec_init();

	/* Program EC Keyboard locale based on VPD data */
	program_keyboard_type(search_address, search_length);

	/* Get NIC's IO base address */
	ethernet_dev = dev_find_device(BUTTERFLY_NIC_VENDOR_ID,
				       BUTTERFLY_NIC_DEVICE_ID, dev);
	if (ethernet_dev != NULL) {
		io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe;

		/*
		 * Battery life time - LAN PCIe should enter ASPM L1 to save
		 * power when LAN connection is idle.
		 * enable CLKREQ: LAN pci config space 0x81h=01
		 */
		pci_write_config8(ethernet_dev, 0x81, 0x01);
	}

	if (io_base) {
		/* Program MAC address based on VPD data */
		program_mac_address(io_base, search_address, search_length);

		/*
		 * Program NIC LEDS
		 *
		 * RTL8105E Series EEPROM-Less Application Note,
		 * Section 5.6 LED Mode Configuration
		 *
		 * Step1: Write C0h to I/O register 0x50 via byte access to
		 *        disable 'register protection'
		 * Step2: Write xx001111b to I/O register 0x52 via byte access
		 *        (bit7 is LEDS1 and bit6 is LEDS0)
		 * Step3: Write 0x00 to I/O register 0x50 via byte access to
		 *        enable 'register protection'
		 */
		outb(0xc0, io_base + 0x50);	/* Disable protection */
		outb((BUTTERFLY_NIC_LED_MODE << 6) | 0x0f, io_base + 0x52);
		outb(0x00, io_base + 0x50);	/* Enable register protection */
	}
}

开发者ID:kleopatra999，项目名称:coreboot，代码行数:50，代码来源:mainboard.c

示例20: write_protect_vgabios

static void write_protect_vgabios(void)
{
	device_t dev;

	printk(BIOS_INFO, "write_protect_vgabios\n");
	/* there are two possible devices. Just do both. */
	dev = dev_find_device(PCI_VENDOR_ID_VIA,
			      PCI_DEVICE_ID_VIA_VX855_MEMCTRL, 0);
	if (dev)
		pci_write_config8(dev, 0x80, 0xff);
	/*vx855 no th 0x61 reg */
	/*dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_VLINK, 0);
	   //if(dev)
	   //   pci_write_config8(dev, 0x61, 0xff); */
}

开发者ID:XVilka，项目名称:coreboot，代码行数:15，代码来源:vga.c

注：本文中的dev_find_device函数示例由纯净天空整理自Github/MSDocs等源码及文档管理平台，相关代码片段筛选自各路编程大神贡献的开源项目，源码版权归原作者所有，传播和使用请参考对应项目的License；未经允许，请勿转载。

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C++ dev_find_device函数代码示例

示例1: ctrl_init

示例2: vt8237_cfg

示例3: vt8237r_cfg

示例4: uart_mem_init

示例5: write_protect_vgabios

示例6: acpi_fill_mcfg

示例7: init

示例8: init

示例9: set_led

示例10: vt8237_ide_80pin_detect

示例11: acpi_fill_mcfg

示例12: get_memory_size

示例13: acpi_fill_mcfg

示例14: pirq_assign_irqs

示例15: pirq_assign_irqs

示例16: pci_domain_set_resources

示例17: variant_mainboard_final

示例18: pirq_assign_irqs

示例19: mainboard_init

示例20: write_protect_vgabios

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